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SP810_SysCtrl - registers

This section describes the registers.


Table 1. SP810_SysCtrl registers
Name Offset Access Description
SCCTRL 0 Read/write System control
SCSYSSTAT 4 Read/write System status
SCIMCTRL 8 Read/write Interrupt mode control
SCIMSTAT C Read/write Interrupt mode status
SCXTALCTRL 10 Read/write Crystal control
SCPLLCTRL 14 Read/write PLL control
SCPLLFCTRL 18 Read/write PLL frequency control
SCPERCTRL0 1C Read/write Peripheral control
SCPERCTRL1 20 Read/write Peripheral control
SCPEREN 24 Write only Peripheral clock enable
SCPERDIS 28 Write only Peripheral clock disable
SCPERCLKEN 2C Read only Peripheral clock enable status
SCPERSTAT 30 Read only Peripheral clock status
SCSysID0 EE0 Read only System identification 0
SCSysID1 EE4 Read only System identification 1
SCSysID2 EE8 Read only System identification 2
SCSysID3 EEC Read only System identification 3
SCITCR F00 Read/write Integration test control
SCITIR0 F04 Read/write Integration test input 0
SCITIR1 F08 Read/write Integration test input 1
SCITOR F0C Read/write Integration test output
SCCNTCTRL F10 Read/write Counter test control
SCCNTDATA F14 Read/write Counter data
SCCNTSTEP F18 Write only Counter step
SCPeriphID0 FE0 Read only Peripheral identification 0
SCPeriphID1 FE4 Read only Peripheral identification 1
SCPeriphID2 FE8 Read only Peripheral identification 2
SCPeriphID3 FEC Read only Peripheral identification 3
SPCellID0 FF0 Read only PrimeCell identification 0
SPCellID1 FF4 Read only PrimeCell identification 1
SPCellID2 FF8 Read only PrimeCell identification 2
SPCellID3 FFC Read only PrimeCell identification 3