GICv3Distributor - about
The GICv3Distributor component is a generic architectural model of a GICv3 distributor. You can configure it to mimic a GICv3 distributor implementation.
To use this component, you need:
- An ARMv8-A core model that communicates over the stream interface (defined in the GICv3 engineering specification) to distribute interrupts.
- A SystemIP license, separate from ARMv8-A core licenses.
This component has ports with up to 256 processing elements. There is a separate port for each communications link to a core.
Use the CPU-affinities parameter to communicate to the model the affinity address of each of the ports. Match the affinity addresses to the affinity values in the MPIDR registers of the connected core. For n affinity addresses, associated processing elements connect to redistributor_m up to redistributor_m[n-1].
You can use this component as a filter for memory transactions. It forwards transactions that enter it on pvbus_s but that do not match any memory address range that is configured for the distributor.
In systems without cache state modeling and the memory interconnect, you can connect this component serially between the master and the memory system. It catches transactions for the distributor and passes transactions for other components to the pvbus_s port. The distributor is also a transaction master, so transactions out of pvbus_m must be able to access memory that is associated with GICv3 behaviors.
For more advanced systems, to separate generated and forwarded traffic, you can use the distributor as a filter using port pvbus_filtermiss_m. When you connect this port to a PVBus slave, generated traffic is output on port pvbus_m while forwarded traffic is output on pvbus_filtermiss_m. This arrangement allows you to:
- Flexibly configure the GIC.
- Forward the traffic to a point in the memory system where transactions can observe memory as expected in an implementation.
Finally, if the GICv3 distributor has a predictable address range, connect pvbus_m to a suitable point in the memory system, and connect pvbus_filtermiss_m to a transaction sink. In theory, these platforms have no forwarded traffic. However, this precaution creates a behavior to match implementations and protect against the creation of a cyclical path for a memory transaction.