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DP550 component

This section describes the DP550 component.

DP550 - about

This component is a model of r0p0 of the DP550 Display Processor. Connect it to a visualization component to view LCD output.

It is a C++ component with a LISA wrapper.

It passes tests as part of a booting Android kernel and running under the control of the official DP550 drivers.


  • All RGB and YUV format parsing, except ARM Frame Buffer Compression (AFBC) formats.
  • Color adjustment in Display Engine (DE).
  • Nearest neighbor scaling.
  • All layers.
  • Alpha blending.
  • Memory writeback.
  • Inverse gamma adjustment.
  • Basic layer (overlay) and register security semantics.


  • No support for polyphase scaling algorithm, only support for nearest neighbor.
  • No support for 3D or interlaced video.
  • No QoS support.
  • No support for image enhancing functionality in the Scaling Engine (SE).
  • No AFBC support.
  • No dithering support.
  • Power/test modes are modeled only as register state changes.
  • No chroma keying support.
  • No gamma adjustment support.
  • No support for the YUV420p2 format as an output format.

DP550 - ports

This section describes the ports.

Table 4-51 DP550 ports

Name Protocol Type Description
clk_in ClockSignal Slave Master clock input, typically 12.6MHz, to drive pixel clock timing.
display LCD Master Connection to visualization component.
intr Signal Master Interrupt signaling from display engine.
intr_se Signal Master Interrupt signaling from scaling engine.
pvbus_m PVBus Master DMA port for video data.
pvbus_s PVBus Slave Slave port for connection for APB access.
reset_signal Signal Slave Slave port for external reset line.

DP550 - parameters

This section describes the parameters.

Table 4-52 DP550 parameters

Name Type Allowed values Default value Description
force_frame_rate uint32_t 0-60 0
Model uses input clock as PXLCLOCK.
Model refreshes screen display n times per simulated second.
register_debug bool true, false false Print summary of register reads and writes.

DP550 - registers

This component provides the registers that the Technical Reference Manual (TRM) specifies.