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MemoryMappedGenericWatchdog component

This section describes the MemoryMappedGenericWatchdog component.

MemoryMappedGenericWatchdog - about

This component is a model of the memory mapped counter module. It is a high-level watchdog, one which generates two interrupts rather than an interrupt then a reset.

MemoryMappedGenericWatchdog - ports

This section describes the ports.

Table 4-78 MemoryMappedGenericWatchdog - ports

Name Protocol Type Description
cntvalueb CounterInterface Slave -
ctl_pvbus_s PVBus Slave -
ref_pvbus_s PVBus Slave -
WS0 Signal Master -
WS1 Signal Master -

MemoryMappedGenericWatchdog - parameters

This section describes the parameters.

Table 4-79 MemoryMappedGenericWatchdog parameters

Name Type Allowed values Default value Description
diagnostics uint32_t 0x0-0x4 0x0 Diagnostics
NONSECURE bool true, false false Non-Secure
product_id uint8_t - 0x0 Product identifier