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ARM926CT component

This section describes the ARM926CT component.

ARM926CT - about

This C++ component is a model of r0p5 of a ARM926EJ-S™ processor.

ARM926CT - ports

This section describes the ports.

Table 3-85 ARM926CT ports

Name Protocol Type Description
clk_in ClockSignal Slave Clock input
pvbus_m PVBus Master Master port for all memory accesses
reset Signal Slave Asynchronous reset signal input
irq Signal Slave Asynchronous IRQ signal input
fiq Signal Slave Asynchronous FIQ signal input
ticks InstructionCount Master Output that can be connected to a visualization component

ARM926CT - parameters

This section describes the parameters.

Table 3-86 ARM926CT parameters

Name Type Allowed values Default value Description
BIGENDINIT Boolean true, false false Initialize to ARMv5 big endian mode.
INITRAM Boolean true, false false Initialize with ITCM0 enabled at address 0x0.
VINITHI Boolean true, false false Initialize with high vectors enabled.
itcm0_size Integer 0x000-0x400 0x8 Size of ITCM in KB.
dtcm0_size Integer 0x000-0x400 0x8 Size of DTCM in KB.
device-accurate-tlb Boolean true, false falsea Specify whether all TLBs are modeled.
semihosting-cmd_lineb String No limit except memory [Empty string] Command line available to semihosting SVC calls.
semihosting-enable Boolean true, false true Enable semihosting SVC traps. Caution: applications that do not use semihosting must set this parameter to false.
semihosting-ARM_SVC Integer uint24_t 0x123456 A32 SVC number for semihosting.
semihosting-Thumb_SVC Integer uint8_t 0xAB T32 SVC number for semihosting.
semihosting-heap_base Integer 0x00000000-0xFFFFFFFF 0x0 Virtual address of heap base.
semihosting-heap_limit Integer 0x00000000-0xFFFFFFFF 0x0F000000 Virtual address of top of heap.
semihosting-stack_base Integer 0x00000000-0xFFFFFFFF 0x10000000 Virtual address of base of descending stack.
semihosting-stack_limit Integer 0x00000000-0xFFFFFFFF 0x0F0000000 Virtual address of stack limit.
cpi_mul Integer 1-0x7FFFFFFF 1 Multiplier for calculating Cycles Per Instruction (CPI).
cpi_div Integer 1-0x7FFFFFFF 1 Divider for calculating CPI.
dcache-state_modelled Boolean true, false false Set whether D-cache has stateful implementation.
icache-state_modelled Boolean true, false false Set whether I-cache has stateful implementation.
dcache-size Integer 0x1000-0x20000 0x20000 Set D-cache size in bytes.
icache-size Integer 0x1000-0x20000 0x20000 Set I-cache size in bytes.

ARM926CT - registers

This component provides the registers that the Technical Reference Manual (TRM) specifies except for the coprocessor 14 registers and the integration and test registers.

ARM926CT - debug features

This component exports a CADI debug interface.

ARM926CT - debug - registers

All core and CP15 registers are visible in the debugger.

The CP14 DSCR register is visible for compatibility with some debuggers. This register has no defined behavior.

ARM926CT - debug - breakpoints

This component directly supports single address unconditional instruction breakpoints, unconditional instruction address range breakpoints, and single address unconditional data breakpoints.

The debugger might augment these with more complex combinations of breakpoints.

The model does not support CADI exception breakpoints. Instead, it implements exception breakpoints as register breakpoints on pseudoregisters, named after the exceptions, in the Vectors register group.

ARM926CT - debug - memory

This component presents a single flat 4GB view of virtual memory as seen by the processor.

ARM926CT - verification and testing

This component passes tests by using the architecture validation suite tests and booting of Linux on an example system.

ARM926CT - differences between the CT model and RTL implementations

This component differs from the corresponding revision of the RTL implementation.

There is a single memory port combining instruction, data, and peripheral access.

a

Specifying false models enables modeling a different number of TLBs if this improves simulation performance. The simulation is architecturally accurate, but not device accurate. Architectural accuracy is almost always sufficient. Specify true if device accuracy is required.

b

The value of argv[0] points to the first command line argument, not to the name of an image.

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