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4.4.58 RemapDecoder component
This section describes the RemapDecoder component.
RemapDecoder - about
The RemapDecoder component provides the low memory flash/RAM remap behavior of the example systems.
This is a LISA+ component.
RemapDecoder - ports
This section describes the ports.
Table 4-149 RemapDecoder ports
| Name | Protocol | Type | Description |
|---|---|---|---|
input |
PVBus | Slave | For connection to PV bus master/decoder. |
output_remap_set |
PVBus | Master | For connection to a component addressable with remap set. |
output_remap_clear |
PVBus | Master | For connection to a component addressable with remap clear. |
remap |
StateSignal | Slave | Input permitting control of remap state. |
control |
TZSwitchControl | Internal port. Not for use. |
RemapDecoder - verification and testing
This component passes tests as part of the VE example system by using VE test suites and by booting operating systems.