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PVBus2AMBAPVACE component

This section describes the PVBus2AMBAPVACE component.


This component converts from PVBus to AMBAPVACE protocols.

This is a LISA+ component.


This section describes the ports.

Table 4-5 PVBus2AMBAPVACE ports

Name Protocol Type Description
pvbus_s PVBus Slave Handles incoming transactions from PVBus masters. Converted upstream ACE snoop and DVM transactions are sent out through this port.
amba_pv_ace_m AMBAPVACE Master Master port for connection to top-level AMBAPVACE master port. Converted transactions are sent out through this port. Handles incoming ACE snoop and DVM transactions from AMBA-PV ACE slaves.

PVBus2AMBAPVACE - parameters

This section describes the parameters.

Table 4-6 PVBus2AMBAPVACE parameters

Name Type Allowed values Default value Description
force-dmi-size bool true, false true Align DMI start and end addresses to 4kB. If true, DMI memory is faster, but DMI regions that are less than 4kB in size or not 4kB aligned are inaccessible.
global-monitor bool true, false false Enable built-in global monitor. This may be required if cache-state modeling is disabled in up-stream cores and the down-stream platform contains no global monitor.
size uint64_t 0 to 264 - 1, where 0 represents 264 bytes, but must also be a multiple of 0x1000 (4KB) 0x1000000000000 Addressable size of the device in bytes.

PVBus2AMBAPVACE - debug features

This component supports debug bus transactions but has no specific debug features.

PVBus2AMBAPVACE - verification and testing

This component passes tests using system level tests that included booting Linux on an ARM® big.LITTLE™ VE platform.

PVBus2AMBAPVACE - performance

The translation of bus transactions by the bridge has some impact on performance. Bus masters that cache memory transactions avoid much of this impact.

PVBus2AMBAPVACE - library dependencies

This component depends on the AMBA-PV API, which must be at least version 1.4.