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CCN504 component

This section describes the model of r0p0 of the CCN504 interconnect component.

CCN504 - ports

This section describes the ports.

CCN504 has three downstream ports: two SNF ports for the memory controller, and one Acelite port (HNI).

Table 4-46 CCN504 ports

Name Protocol Type Description
pvbus_s_rnf[4] PVBus Slave RNF upstream ports.
pvbus_s_rni[18] PVBus Slave RNI upstream ports.
pvbus_m_hni[1] PVBus Master HNI downstream port.
pvbus_m_snf[2] PVBus Master SNF downstream ports.
reset_in Signal Slave Reset signal.

CCN504 - parameters

This section describes the parameters.

Table 4-47 CCN504 parameters

Name Type Allowed values Default value Description
acchannelen_rnf uint32_t 0-15 15 Bitmap for each RNF upstream port to test if snoop requests are enabled.
acchannelen_rni uint32_t 0x0-0x3ffff 0x3ffff Bitmap for each RNI upstream port to test if DVM requests are enabled.
cache_size_in_mbytes uint32_t - 8 Size of the L3 cache to model.
cache_state_modelled bool true, false true Model the cache state.
force_on_from_start bool true, false false The component normally starts up with snooping disabled. Set this parameter to true to allow the model to start up as enabled without having to program it. This parameter affects simulation reset and not signal reset.
number_of_snf uint32_t 1-2 2 Number of SNF nodes present.
periphbase uint64_t - 0x2C000000 Value for PERIPHBASE. Only bits [43:24] are used.
sbas_bridge_present bool true, false true Value for SBAS bridge presence.
sbsx_bridge_present bool true, false true Value for SBSX bridge presence.
systemaddrmap uint64_t 0x0-0xffffffffff 0x0 Bitmap for 20 regions in the CCN interconnect. Every two bits describe the region type for the corresponding region.