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Cache Coherent Interconnect snoop and DVM enables

You can program the CCI-400 to control where snoop and DVM messages are transmitted.


The changes to the snoop control and DVM routing require a finite amount of time to take effect. To determine when they have taken effect, you must poll a register in the CCI-400.


Any transactions created in the interim period might or might not observe the change and therefore might lead to race conditions and unpredictable behavior. The checker sets a flag when the snoop or DVM filters are changed. This flag is only de-asserted after a successful read of a 0, representing snoops in effect, from the CCI-400 Status Register. While the flag is set, any shared transactions or DVM messages produce warning messages.

Example 1

FVP_VE_Cortex_A15x4_Cortex_A7x4.coretile.cci400.cciinterconnect: received a transaction in page ns-000000008ff0d000 It is shared, however, a pending snoop request is in progress and so there is a race condition as to whether this request will obey the snoop request or not. The transaction attributes are:- PND-u0x0-m0x2-ish-rawaC-rawaC upstream port3 ns-000000008ff0d000 You should poll the CCI-400 Status Register until it says that the snoop changes have taken effect. During this time you should ensure that no shared data is prefetchable from any of the cores attached to this cluster and that it shouldn't contain shared data in any of the caches as they might be evicted.

Example 2

FVP_VE_Cortex_A15x4_Cortex_A7x4.coretile.cci400.cciinterconnect: received a DVM message: <message> However, a snoop change is pending and so there is a race condition as to whether this message would obey the new snoop value or not.