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Dual Cluster System Platform ID Register, DCS_ID

The read-only DCS_ID register provides version information for the dual cluster system implementation.

The following table shows the bit assignments.

Table 1. DCS_ID Register bit assignments
Bits Name Type Description
[31:24] IMPLEMENTER RO Reads as 8’h41 to indicate ARM Limited.
[23:20] VARIANT RO

Identifies the implementation target. Reads as:

4’h0
For Versatile Express.
4’h1
For software model.
[19:16] ARCHITECTURE RO

Identifies the DCS architecture:

4’h0
Reserved.
4’h1
Cortex-A15 plus Cortex-A15 system.
4’h2
Cortex-A15 plus Cortex-A7 system.
[15:4] - RO Reserved.
[3:0] REVISION RO RAZ