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Interrupt Generator Control Register, INT_CTRL

The INT_CTRL register starts and stops the generation of interrupts from the interrupt generation trickbox.

See 3.22 Reset architecture for a complete description of how to set up and use trickbox interrupts. The following table shows the bit assignments for the INT_CTRL register. If the interrupt generator is not present, then this register is RAZ/WI.

Table 3-40 INT_CTRL Register bit assignments

Bits Name Type Description
[1] TIMER_EN RW

Enables automatic generation of interrupts at regular intervals:

0 Do not generate timer-based interrupts. Interrupts are not generated automatically, but you can still generate them manually.
1 Generate regular interrupts using the timer, if ENABLE is HIGH.
[0] ENABLE RW

Enable interrupts from the interrupt trickbox:

0 The trickbox does not generate interrupts, neither automatically nor explicitly-requested.
1 The trickbox can generate interrupts.

The timer that controls automatic assertion of interrupts runs when all the following are true:

  • INT_CTRL.ENABLE is HIGH.
  • INT_CTRL.TIMER_EN is HIGH.
  • Additional interrupts are available for generation, indicated by INT_NUMER.SATURATED being LOW.

If any of the above conditions are not met, then the timer does not run and interrupts are not asserted automatically. When the timer is paused because INT_CTRL.ENABLE is LOW or INT_CTRL.TIMER_EN is LOW, it resumes from its previous position when the appropriate enable is set HIGH.

If the timer is halted because no additional interrupts are available for generation, the timer can only start again when all the interrupts are acknowledged using the INT_ACK register.

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