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Interrupt Generator Interrupt Frequency Register, INT_FREQ

The INT_FREQ register controls the frequency at which the interrupt generator automatically asserts interrupts, if this functionality is enabled in the INT_CTRL register.

The following table shows the bit assignments for the INT_FREQ register.

Table 3-41 INT_FREQ Register bit assignments

Bits Name Type Description
[9:0] FREQUENCY RW

Controls the frequency of timer-generated interrupts, when INT_CTRL.TIMER_EN is HIGH. Set this field to n to generate interrupts every n+1 cycles when the timer is enabled. This means that a value of:

0 Generates an interrupt every clock cycle.
1 Generates an interrupt every second clock cycle.
2 Generates an interrupt every third clock cycle.
... And so on.

Writing any value to the INT_FREQ register causes the internal interrupt timer to be cleared, but it automatically restarts if it is enabled. The INT_FREQ register can be updated at any time, even if interrupt generation is currently enabled. If the interrupt generation trickbox is not present, then this register is RAZ/WI.

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