Reset Status Registers, RST_STAT0 and RST_STAT1
The read-only Reset Status Registers are RST_STAT0 and RST_STAT1.
|RST_STAT0||Returns the reset status of the Cortex®‑A15 cluster.|
|RST_STAT1||Returns the reset status of the Cortex‑A7 cluster.|
Each read-only RST_STATx register can determine the resets that the reset controller is currently asserting.
Table 3-32 RST_STATx Register bit assignments
|||CLUSTER_RESET||RO||Reads as 1 if the cluster is held in a cluster reset. Otherwise, it reads as 0.|
|[7:4]||CPU_PORESET||RO||Each bit n reads as 1 if core n is held in core power-on reset. Otherwise, it reads as 0.|
|[3:0]||CPU_RESET||RO||Each bit n reads as 1 if core n is held in core reset. Otherwise, it reads as 0.|