You copied the Doc URL to your clipboard.

1.7. Control coprocessor (CP15)

The CP15 allows configuration of both the caches and the tightly coupled SRAMs, the write buffer, and other ARM946E-S functions.

Several registers within CP15 are available for program control, providing access to features such as:

  • big or little-endian operation

  • low power state

  • memory partitioning and protection

  • full memory BIST (Built-in Self Test).

Was this page helpful? Yes No