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1.4.13. The ARMv4T instruction sets

Table 1.2 shows the ARMv4T ARM and Thumb instruction sets.

The ARMv4T ARM and Thumb Instruction Sets
ARMThumbInstructionOperation

Data processing instructions

??

MOV

Move

??

MVN

Move Not

? 

MRS

Move from Status Register

? 

MSR

Move to Status Register

??

LDR

Load Word

??

LDRB

Load Byte

??

LDRH

Load Halfword

??

LDRSB

Load Signed Byte

??

LDRSH

Load Signed Halfword

??

LDM

Load Multiple

??

STR

Store Word

??

STRB

Store Byte

??

STRH

Store Halfword

??

STM

Store Multiple

Arithmetic instructions

??

ADD

Add

??

ADC

Add with Carry

??

SUB

Subtract

??

SBC

Subtract with Carry

??

RSB

Reverse Subtract

??

RSC

Reverse Subtract with Carry

??

MUL

Multiply

? 

MLA

Multiply Accumulate

? 

UMULL

Unsigned Long Multiply

? 

UMLAL

Unsigned Long Multiply Accumulate

? 

SMULL

Signed Long Multiply

? 

SMLAL

Signed Long Multiply Accumulate

Branch instructions
??

B

Branch

??

BL

Branch with Link

??

BX

Branch and Exchange

Shift/rotate instructions
 ?

LSL

Logical Shift Left

 ?

LSR

Logical Shift Right

 ?

ASR

Arithmetic Shift Right

 ?

ROR

Rotate Right

Logical and compare instructions
??

AND

Logical AND

??

ORR

Logical (inclusive) OR

??

EOR

Logical Exclusive OR

??

BIC

Bit Clear

??

TST

Test

? 

TEQ

Test Equivalence

 ?

NEG

Negate

??

CMP

Compare

??

CMN

Compare Negated

Coprocessor instructions
??

LDC

Load to Coprocessor

??

STC

Store from Coprocessor

??

MCR

Move to Coprocessor

??

MRC

Move from Coprocessor

??

CDP

Coprocessor Data Processing

Miscellaneous instructions
??

SWI

Software Interrupt

? 

SWPB

Swap Byte

? 

SWP

Swap Word

 ?

PUSH

Push Registers to Stack

 ?

POP

Pop Registers from Stack

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