Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.17 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.17

• CI700 r2p0 and r1p0 have been added to the Fast Models Portfolio. The version is now read from the mesh_config_file.
• CMN600, CMN600AE, CMN650, CMN700, and CI700 changes:

  • Added DVM_Message to GenericTrace.

  • RNSAM_Memory_Map trace size increased to accommodate large memory maps.

  • Fixed the ability to write to POR_HNF_CFG_SLCSF_DBGRD.

  • The target_type field in sys_cache_grp_region* registers is now only applicable to RN-I.

  • Unused configuration address space within 1GB of PERIPHBASE can be used for memory regions.

  • Fixed POR_MXP_P*_INFO register's reset value to set esam_en correctly.

  • Hashed Memory Region (including OCM) size calculation when using CAL fixed to match TRM.

  • Fixed and added to the functionality of the *secure_register_groups_override for all components.

• CMN700-specific changes:

  • Revision parameter description reflects rXpYs supported.

  • Fixed an issue where setting POR_RNSAM_NUM_HTG_PARAM to a value greater than 8 would cause an error.

  • Improved error message when in non-cluster mode and there are more local + remote RNFs than RN_CLUSTER<index>_PHYSID_REGs.

  • The revision part (rXpY) of the global parameter version in the topology file overrides model parameter revision.

  • Fixed POR_MXP_CHILD_POINTER register's reset value to read CCLA nodes as internal.

  • CXL Type-3 (CXL.mem) devices can be connected to the pvbus_m_cxs[] ports. The CXRH nodes, if any, are connected to pvbus_m_cxs[0] ,,, followed by the CCG nodes, if any.

• CMN650 and CI700-specific changes:
  • Fixed the reset value of the rnsam_status register.
• CI700-specific changes:
  • Example platform AEMvA-AEMvA-CI700 added.
• CMN600-specific changes:
  • Fixed the configuration address space size. PERIPHBASE is now 256MB-aligned when either mesh dimension is greater than 4, otherwise 64MB-aligned.
• CMN600AE-specific changes:
  • Fixed the configuration address space size. PERIPHBASE is now 64MB-aligned, irrespective of mesh size.

Important notices

• Fast Models no longer supports GCC-6.4 and VS2017 compilers.
• The next release, 11.18, will be the last to support Ubuntu 16.04.
• In a future release, the version of Microsoft Visual Studio 2019 supported by Fast Models will move from 16.7 to 16.11. Users will need to upgrade Visual Studio 2019 to at least version 16.11 to remain compatible after that point.
• The following reference platforms have changes that are incompatible with the published reference software stack at the time of release:
  • RD-N2
  • RD-Edmunds
  • RD-V1
  • RD-N1-Edge
  • RD-E1-Edge
  • SGI-575
  An update to the software stack will be made in March 2022 that will align with these changes.
• Based on guidance from our trade compliance team, the crypto plugin (crypto.dll and crypto.so) will be removed from the main Fast Models package  the next release and placed within a separate add-on package. Instructions for obtaining the add-on package will appear in the next release note.

Compilers and Operating Systems supported by Fast Models

• RedHat 7 with GCC-7.3.0 and GCC-9.3.0.
• RedHat 8 with GCC-9.3.0.
• Ubuntu 16.04 with GCC 7.3.0.
• Ubuntu 18.04 with GCC 7.3.0.
• Ubuntu 20.04 with GCC-9.3.0.
• Windows 10 with Visual Studio 2019 version 16.7.3 or later.
• The following Visual Studio components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
• Windows SDK version 10.0.16299.0 or later is required for Visual Studio 2019 support.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.17 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMvA-AEMvA \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMvA-AEMvA.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA/GPU model issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• There is no log output from an FVP using the --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES =1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• The following CADI methods are deprecated for use in Fast Models 11.17:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal shall be removed in a future release.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.16 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.16

• The Embedded Trace Extension (ETE) is now supported as a plug-in by the AEM and applicable CPU implementations.
• The following models have been added to the Fast Models Portfolio:
  • Cortex-X2
  • CI700 r0p0
• CMN600, CMN600AE, CMN650, CI700, and CMN700 changes:

  • Model parameter hnf_cache_size has been removed. Use HNF_SLC_SIZE_PARAM in the mesh topology file to specify the HNF cache size. If this parameter is not defined in the yml, you'll see the following warning message:

    Parameter 'hnf.HNF_SLC_SIZE_PARAM' not defined in topology file.
    Hence default value 2 is considered

    To specify the hnf cache size, either regenerate the topology using the latest Socrates or manually add hnf parameter HNF_SLC_SIZE_PARAM to the topology file and validate the topology:

        params: {
           global: {
              ...
           },
           hnf: {
             HNF_SLC_SIZE_PARAM: -2
           }
        }

    Mapping for HNF_SLC_SIZE_PARAM values to cache sizes:

    • -8: 0K
    • -2: 128K
    • -1: 256K
    • 0: 512K
    • 1: 1M
    • 2: 2M
    • 3: 3M
  • OCM support of exclusive loads and stores has been fixed.
  • Fixed RNSAM_UNIT_INFO register reset value.
  • Fixed RNSAM index in RNSAM_NODE_INFO register.
• CMN600-specific changes:
  • Fixed the total number of non-hashed regions to be 20.
• CMN650 and CMN700-specific changes:
  • Transaction routing to the default target is now supported. Accesses to address regions outside of the configured RNSAM target regions will now be redirected to the HND node. All transactions can also be forced to be redirected to the HND node by setting the use_default_node bit in the RNSAM_STATUS registers.
• CMN700-specific changes:
  • Added CCG registers.
  • Fixed HNF_UNIT_INFO registers reset value.
  • Fixed to detect CXRH node information when there are no CCG nodes.
  • Fixed the reset values of the following registers:
    • por_hnf_unit_info_1[33:29] - hnsam_rcomp_lsb
    • por_rnsam_unit_info1[9:5] - nonhash_rcomp_lsb
    • por_rnsam_unit_info1[4:0] - htg_rcomp_lsb
  • Changing the default minimum region size is now allowed only when the RCOMP_EN parameter is set.
  • The default for RCOMP_LSB is now 26 to match the TRM default.
  • Fixed an issue where the HNV nodes could not be used as targets in a SAM memory region.
  • Additional error messages have been added when the model cannot find the desired target nodeid for a memory region.
• Mali G710 (Linux only) has been added to the Fast Models Portfolio. If you need more information about this model and its Windows version, contact support-esl@arm.com.

Important notices

• Fast Models 11.16 is the final release that supports the following compilers:
  • VS2017.
  • GCC 6.4.
  Support for these compilers will be removed from the next release.
• GCC 4.9 is no longer supported.
• Fast Models no longer collects product analytics data. The command-line option --disable-analytics is no longer supported.
• The AEMv8A platforms have been removed. A selected list of AEMv8A platforms have been ported to AEMvA. If you still depend on one or more of the platforms which have not been ported, contact support-esl@arm.com.
• Fast Models platforms now depend on a new shared library arm_singleton_registry.so/.dll. This library is installed as part of the standard installation and can be found in the Portfolio lib directories. A platform build with simgen automatically copies this new library into the build target directory along with the other dependencies. Running a Fast Models platform when this library is not available results in the following warning on the console:

      The arm_singleton_registry dynamic library was not found.
      For better robustness, either copy the library in the executable folder
      or set the env. variable FASTSIM_SINGLETON_REGISTRY to the full library path.
      WARNING: Continuing without the shared object registry library.

Fast Models limitations

This section contains limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• CMN600, CMN600AE, CMN650, CI700, CMN700 have the following new limitations:
  • OCM model does not partition Secure/NonSecure. This will be fixed in a future release.
  • HNFs with different SLC sizes in the same configuration are not supported.
  • Transactions to addresses unused by Device registers in the Configuration Register Space are always routed to the Configuration Space even when the SAM is configured to use those addresses.
• CMN700 R1 has the following new limitation:
  • Max mesh size supported is X=12, Y=12.

Compilers and Operating Systems supported by Fast Models

• RedHat 7 with GCC-6.4.0, GCC-7.3.0 and GCC-9.3.0 (initial beta support).
• RedHat 8 with GCC-9.3.0 (initial beta support).
• Ubuntu 16.04 with GCC 7.3.0.
• Ubuntu 18.04 with GCC 7.3.0.
• Ubuntu 20.04 with GCC-9.3.0 (initial beta support).
• Windows 10 with Visual Studio 2017 version 15.9.11 or later.
• Windows 10 with Visual Studio 2019 version 16.7.3 or later.
• The following Visual Studio components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
• Windows SDK version 10.0.16299.0 or later is required for Visual Studio 2019 support.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.16 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMvA-AEMvA \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMvA-AEMvA.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA/GPU model issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.
  • Android 12 support for GGA requires a Mesa3D OpenGLES driver of version 20.3.4 or greater. A build of a Mesa3D OpenGLES driver that is compatible with all Fast Models Linux platforms will be available in an upcoming patch package for this release.

• There is no log output from an FVP using the --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES =1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• The following CADI methods are deprecated for use in Fast Models 11.16:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal shall be removed in a future release.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.15 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.15

• The following models have been added to the Fast Models Portfolio:
  • Cortex-A78AE
  • Cortex-A510
  • Cortex-A710
  • Neoverse N2
  • Neoverse V1
  • Ethos-U65
  • CMN-700 r0p0
  • MMU-700
• An AEMv8R64 source example has been added to the Fast Models Portfolio.
• The AEMv8-A platforms are deprecated. A selected list of them has been ported to AEMvA which enables Armv8-A, Armv9-A, and other Future Architecture Technologies, selectable using parameters. Currently, we do not plan to port other platforms to AEMvA, and in the next release, all the AEMv8-A platforms will be removed. For more information, contact support@arm.com.
• The Fastline plug-in is end-of-life and has been removed from the Fast Models release.
• CMN600, CMN600AE, CMN650, and CMN700 changes:
  • A new model parameter disable_CML_port has been added. Set it to true to disable the model's connection to the CML port. Although the registers associated with CML features are still accessible, transactions are not sent out of the CMN. An INFO message is displayed when the disable_CML_port parameter is set, and up to 3 WARNING messages per CMN instance are printed when a register access is made to:
    1. Update the CMN memory map through accesses to RNSAMs AND a link is detected as "enabled".
    2. Access por_*_ha_cxprtcl_linkX_ctl.
    3. Access por_*_ra_cxprtcl_linkX_ctl.
  • There are now two ways to specify the periphbase address:
    • Set model parameter periphbase with the address.
    • Set model parameter use_yml_periphbase to true and specify the address in the topology file using parameter CFGM_PERIPHBASE_PARAM.
  • Debugger reads of the address space through the memory view have been fixed. Errors are also printed for non-aligned 8-bit accesses.
  • Fixed target id calculation for configuring non-hashed regions as hashed.
• CMN600 specific changes:
  • Fixed the total number of non-hashed regions to be 8. It was previously 20.
  • Added an example platform Build_AEMv8A-AEMv8A-CMN600.
• CMN600AE specific changes:
  • FuSa devices are considered external. Therefore the external bit (MSB) of the child pointers is set to 1 for FMU, FDC, and MPU. This is not stated in the CMN600AE Technical Reference Manual r1p0.
• CMN650 specific changes:
  • Before this release, the model supported a maximum of 20 non-hashed regions. With this release, the model reads the parameter RNSAM_NUM_NONHASH_REGION to determine the maximum number of non-hashed regions, with the default being 20.
• CMN700 specific changes:
  • By default, the model assumes that the topology file does not contain the child node addresses and is calculated in the model. To use the node addresses in the yml file, set the yml_has_node_addresses model parameter to true.
  • Before this release, the model supported a maximum of 8 hashed regions. With this release, the model reads the parameter RNSAM_NUM_HTG to determine the maximum number of hashed regions, with the default being 4.
  • Before this release, the model supported a maximum of 64 non-hashed regions. With this release, the model reads the parameter RNSAM_NUM_NONHASH_REGION to determine the maximum number of non-hashed regions, with the default being 8.
  • The enumerations for RNFC/D/E, SNFD/E, and HNV nodes were added and the model has been updated to populate these new values into the MXP port connect info registers whenever appropriate.
  • Reads of the PERIPHBASE will access the CFGM node register block.
  • The node_type field now displays the correct value for HN-P nodes, instead of incorrectly classifying as HN-I.
• Generic Graphics Accelerator (GGA)-specific changes:
  • AFBC is now supported in both GGA-only mode (callOnTargetAPI 0) and GGA+GRM2 mode (callOnTargetAPI 2) for the Bifrost GPU architecture. GPU drivers and graphics stacks can now be compiled with AFBC=y in the configuration.
• The Accellera SystemC version has been updated to to v2.3.3

Important notices

• Fast Models 11.15 is the final release that supports the following combinations:
  • GCC 4.9 and RHEL 6.
  • GCC 4.9 and RHEL 7.
  • GCC 6.4 and Ubuntu 16.04.
• The next release (11.16) will be the final release that supports the following combinations:
  • VS2017 and Windows 10.
  • GCC 6.4 and RHEL 7.
• CMN600, CMN600AE, CMN650, and CMN700 have the following deprecations and removals:
  • The JSON mesh_config_file support was deprecated in release 11.13, and removed in release 11.15.
  • Support for FASTSIM_CMN_INTERNAL_RNSAM was deprecated in release 11.13, and removed in release 11.15.
  • Model parameter force_rnsam_internal is now deprecated. See the note about force_rnsam_internal in the Fast Models Reference Manual.
  • Removed parameter enable_snf_hashing.
• When building an EVS or SVP platform on Windows, in addition to the libraries that were previously specified in Considerations when building an EVS on Windows in the Fast Models User Guide, you must also link against shlwapi.lib, Iphlpapi.lib, and zlib.lib. Refer to the Fast Models User Guide for complete build steps.
• There is a known issue with building FVP_Base_Cortex_A510x4_Cortex_A710x3_Cortex_X2x1 on Windows due to its long name when installed in the default location. The following workarounds are suggested:
  • Move or copy the example to another location with a shorter path.
  • If possible, install Fast Models in an alternative location with a shorter path.
• The current behavior of Simgen is that it directly generates Makefiles on Linux and VS project files on Windows. In future, Simgen will use cmake to generate Makefiles on Linux and VS project files on Windows when generating target platforms. You will not see any change when using or integrating Fast Models but will be required to have cmake in the binary search path.
• Intel-Hex and Verilog-Hex formats are not supported by ElfLoader (peripheral component).
• When has_internal_ppu_support is true, reset for the in-cluster PPUs should be connected which includes cluster_ppu_reset and core_ppu_reset.

Fast Models limitations

This section contains limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• The ClockTimer[64] component has been improved to ensure clocks run correctly when switching frequencies. Previously it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• FastModels 11.15 adds a rel version of the GIC600-AE model supporting register accesses to the fault management unit and the RAS component, with the following functionality expectations:

  • FMU registers are enabled for read and write access with correct reset value.

  • Only secure-access is allowed for FMU registers.

  • Locking mechanism is based on FMU_KEY for FMU register write.

  • APB4 port from safety island to access FMU registers.

  • RAS registers are enabled for read and write access with correct reset value.

  • Parameters to set GICT_ERR<n>FR to individually enable error reporting are supported:

    • RAS-CFI-support: enable fault handling interrupt for corrected error.
    • RAS-UE-support: enable reporting for in-band uncorrected error.
    • RAS-FI-support: enable fault handling interrupt.
    • RAS-UI-support: enable error recovery interrupt for uncorrected error.

  • Access control for RAS registers is based on GICD_SAC. For the reset value, use parameter gict-allow-ns-reset.

  The GIC600-AE model has the following limitations:

  • Actual mechanism of FMU is not implemented yet such as ping/ack control.

  • Actual mechanism of RAS is not implemented yet such as getting notified by wrong ITS configuration or software error.

  • SPI collator is not supported.

  • po_reset signal with model is used for dbg_reset.

  • There is no domain reset.

  FastModels 11.15 adds support for the GIC600-AE registers GICR_CLASSR, GICD_ICLAR and read/write access to the register GICR_FCTLR, in addition to the reporting of the following RAS error types:

  • Software error record 0 for Redistributor on LPI: SYN_ITS_REG_SET_OOR, SYN_ITS_REG_CLR_OOR, SYN_ITS_REG_INV_OOR, SYN_ITS_REG_SET_ENB, SYN_ITS_REG_CLR_ENB, SYN_ITS_REG_INV_ENB.

  • Software error record 0 for Redistributor on configuration: SYN_ACE_BAD, SYN_PPI_PWRDWN, SYN_PPI_PWRCHANGE, SYN_GICR_ARE, SYN_PROPBASE, SYN_PENDBASE_ACC, SYN_LPI_CLR, SYN_WAKER_CHANGE, SYN_SLEEP_FAIL, SYN_PGE_ON_QUIESCE, SYN_PT_PROP_READ_FAIL.

  • Software error record 0 for Redistributor on table access: SYN_LPI_PROP_READ_FAIL, SYN_PT_TABLE_READ_FAIL, SYN_PT_TABLE_WRITE_FAIL.

    • Only Reading properties for individual LPIs, not block of LPIs, is modeled. Hence the reporting of the error types SYN_PT_PROP_READ_FAIL, SYN_PT_SUB_TABLE_READ_FAIL and SYN_PT_TABLE_WRITE_FAIL_BYTE is not modeled.

    • The reporting of the error types SYN_PT_COARSE_MAP_READ_FAIL and SYN_PT_COARSE_MAP_WRITE_FAIL is not modeled.

  • Software error record 0 for Distributor: SYN_ACE_BAD, SYN_GICR_ARE, SYN_GICD_CTLR, SYN_SGI_NO_TGT, SYN_SPI_BLOCK, SYN_SPI_OOR, SYN_SPI_NO_DEST_TGT, SYN_DEACT_IN, SYN_SPI_CHIP_OFFLINE, SYN_SPI_NO_DEST_IOFN.

    The reporting of the error type SYN_GICD_CORRUPTED is not modeled.

  • Software error record 0 for ITS: SYN_ACE_BAD.

    The reporting of the error type SYN_ITS_OFF is not modeled.

  • Software error record 13 for MAP* commands: MAPD_DEVICE_OOR, MAPD_ITTSIZE_OOR, MAPC_COLLECTION_OOR, MAPC_TGT_OOR, MAPC_LPI_OFF, MAPI_DEVICE_OOR, MAPI_COLLECTION_OOR, MAPI_ID_OO, MAPI_UNMAPPED_DEVICE, MAPVI_DEVICE_OOR, MAPVI_COLLECTION_OOR, MAPVI_UNMAPPED_DEVICE, MAPVI_ID_OOR, MAPVI_PHYSICALID_OOR.

    The reporting of the error type MAPC_CHIP_OFFLINE_OOR is not modeled.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:
  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.
• CMN650 and CMN700 have the following new limitations:
  • MPAM Features described in por_hnf_mpam_ns_por_hnf_mpam_idr[31:24] are not implemented or currently supported in the model.
  • The HNF_MPAM_S and HNF_MPAM_NS registers have the wrong reset value.
• CMN700 has the following new limitations:
  • CCG_HA, CCG_RA, and CCLA registers are not implemented properly. Some registers are missing and at incorrect offsets because they were implemented based on the CXG equivalent registers.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC 4.9.2.
• RedHat 7 with GCC 7.3.0, GCC 6.4.0, and GCC 4.9.2.
• Ubuntu 16.04 with GCC 6.4.0 and GCC 7.3.0.
• Ubuntu 18.04 with GCC 7.3.0.
• Windows 10 with Visual Studio 2017 version 15.9.11 or later.
• Windows 10 with Visual Studio 2019 version 16.7.3 or later.
• The following Visual Studio components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
• Windows SDK version 10.0.16299.0 or later is required for Visual Studio 2019 support.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• On Windows hosts, a Linux target OS running Wayland has known issues for GGA.

• There is no log output from an FVP using the --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES =1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• The following CADI methods are deprecated for use in Fast Models 11.15:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.14 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.14

• The Ethos-U55 NPU model now supports Windows hosts.

• The CMN-600AE model has been added to the Fast Models portfolio.

Important notices

• The next release of Fast Models will include changes to the product license features. We plan to consolidate many of the license features used today to simplify the licensing for Fast Models. The goal is to maintain compatibility with older licenses initially, but in some cases users may need to regenerate their license files. Additional instructions will be provided in the next Fast Models Release. Note: If you have questions about the license feature changes, contact support@arm.com.

• The Fastline plug-in has been deprecated and will be removed in a future release.

• Fast Models scheduler support has been dropped.

  This notice is intended for users who build simulation platforms running on the Fast Models scheduler and not the SystemC scheduler.

  Note that all the platforms and models delivered as part of the Fast Models package already use the SystemC scheduler, so this change only affects users who build their own platforms using Fast Models tools.

  Support for the Fast Models scheduler has been dropped. This means that support for dependent targets has been removed and any simgen projects that depend on the Fast Models scheduler will fail to build a binary.

  To find out if a project depends on the legacy scheduler, search for TARGET_ISIM_DEPRECATED = 1 or TARGET_MAXVIEW = 1 in sgproj (simgen project) files.

  You are advised to migrate from the Fast Models scheduler targets TARGET_ISIM_DEPRECATED = 1 and TARGET_MAXVIEW = 1 to the SystemC targets TARGET_SYSTEMC_ISIM = 1 and TARGET_SYSTEMC_MAXVIEW = 1 respectively. Either regenerate the sgproj files using sgcanvas or manually replace the entries in each .sgproj file affected.

• The number of IRQs for M-profile cores must be a multiple of 32.

Fast Models limitations

This section contains limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• FastModels 11.14 adds a rel version of the GIC600-AE model supporting register accesses to the fault management unit and the RAS component, with the following functionality expectations:

  • FMU registers are enabled for read and write access with correct reset value.

  • Only secure-access is allowed for FMU registers.

  • Locking mechanism is based on FMU_KEY for FMU register write.

  • APB4 port from safety island to access FMU registers.

  • RAS registers are enabled for read and write access with correct reset value.

  • Parameters to set GICT_ERR<n>FR to individually enable error reporting are supported:

    • RAS-CFI-support: enable fault handling interrupt for corrected error.
    • RAS-UE-support: enable reporting for in-band uncorrected error.
    • RAS-FI-support: enable fault handling interrupt.
    • RAS-UI-support: enable error recovery interrupt for uncorrected error.

  • Access control for RAS registers is based on GICD_SAC. For the reset value, use parameter gict-allow-ns-reset.

  The GIC600-AE model has the following limitations:

  • Actual mechanism of FMU is not implemented yet such as ping/ack control.

  • Actual mechanism of RAS is not implemented yet such as getting notified by wrong ITS configuration or software error.

  • SPI collator is not supported.

  • po_reset signal with model is used for dbg_reset.

  • There is no domain reset.

  FastModels 11.14 adds support for the GIC600-AE registers GICR_CLASSR, GICD_ICLAR and read/write access to the register GICR_FCTLR, in addition to the reporting of the following RAS error types:

  • Software error record 0 for Redistributor on LPI: SYN_ITS_REG_SET_OOR, SYN_ITS_REG_CLR_OOR, SYN_ITS_REG_INV_OOR, SYN_ITS_REG_SET_ENB, SYN_ITS_REG_CLR_ENB, SYN_ITS_REG_INV_ENB.

  • Software error record 0 for Redistributor on configuration: SYN_ACE_BAD, SYN_PPI_PWRDWN, SYN_PPI_PWRCHANGE, SYN_GICR_ARE, SYN_PROPBASE, SYN_PENDBASE_ACC, SYN_LPI_CLR, SYN_WAKER_CHANGE, SYN_SLEEP_FAIL, SYN_PGE_ON_QUIESCE, SYN_PT_PROP_READ_FAIL.

  • Software error record 0 for Redistributor on table access: SYN_LPI_PROP_READ_FAIL, SYN_PT_TABLE_READ_FAIL, SYN_PT_TABLE_WRITE_FAIL.

    • Only Reading properties for individual LPIs, not block of LPIs, is modeled. Hence the reporting of the error types SYN_PT_PROP_READ_FAIL, SYN_PT_SUB_TABLE_READ_FAIL and SYN_PT_TABLE_WRITE_FAIL_BYTE is not modeled.

    • The reporting of the error types SYN_PT_COARSE_MAP_READ_FAIL and SYN_PT_COARSE_MAP_WRITE_FAIL is not modeled.

  • Software error record 0 for Distributor: SYN_ACE_BAD, SYN_GICR_ARE, SYN_GICD_CTLR, SYN_SGI_NO_TGT, SYN_SPI_BLOCK, SYN_SPI_OOR, SYN_SPI_NO_DEST_TGT, SYN_DEACT_IN, SYN_SPI_CHIP_OFFLINE, SYN_SPI_NO_DEST_IOFN.

    The reporting of the error type SYN_GICD_CORRUPTED is not modeled.

  • Software error record 0 for ITS: SYN_ACE_BAD.

    The reporting of the error type SYN_ITS_OFF is not modeled.

  • Software error record 13 for MAP* commands: MAPD_DEVICE_OOR, MAPD_ITTSIZE_OOR, MAPC_COLLECTION_OOR, MAPC_TGT_OOR, MAPC_LPI_OFF, MAPI_DEVICE_OOR, MAPI_COLLECTION_OOR, MAPI_ID_OO, MAPI_UNMAPPED_DEVICE, MAPVI_DEVICE_OOR, MAPVI_COLLECTION_OOR, MAPVI_UNMAPPED_DEVICE, MAPVI_ID_OOR, MAPVI_PHYSICALID_OOR.

    The reporting of the error type MAPC_CHIP_OFFLINE_OOR is not modeled.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • RNSAMs external to the mesh network are not functionally supported. Note that the model parameter force_rnsam_internal is TRUE by default. If this parameter is set to FALSE and the topology has an RNFx (non-ESAM), the external bit (bit[31]) of the RNSAM children pointer will be enabled. This bit is the only functionality that is governed by this parameter.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.
  • The model parameter periphbase is deprecated in this release. To specify the periphbase address, use the global parameter CFGM_PERIPHBASE_PARAM in the topology file.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC 4.9.2.
• RedHat 7 with GCC 6.4.0 and GCC 4.9.2.
• Ubuntu 16.04 with GCC 6.4.0 and GCC 7.3.0.
• Ubuntu 18.04 with GCC 7.3.0.
• Windows 10 with Visual Studio 2017 version 15.9.11 or later.
• Windows 10 with Visual Studio 2019 version 16.7.3 or later.
• The following Visual Studio components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
• Windows SDK version 10.0.16299.0 or later is required for Visual Studio 2019 support.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.12 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• On Windows hosts, a Linux target OS running Wayland has known issues for GGA.

• There is no log output from an FVP using the --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES =1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.14:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.13 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.13

• The Ethos-U55 NPU model has been added to the Fast Models Portfolio. It currently supports Linux hosts only. Windows support will follow in a subsequent release.

• The Cortex-M55 model supports Custom Datapath Extension (CDE).

• Cortex-A78AE and Cortex-R82 Fast Models are available as add-on packages on request. Contact support-esl@arm.com for more information.

• System Register trace sources have been extended to capture CRm, CRn, opc0, opc1, and opc2 fields.

• Visual Studio 2019 support has been added.

• FastRAM optimization has been added.

  FastRAM is a cache of very large DMI pointers (64MB). When enabled, accesses to the platform RAM by the bus masters do not need to use the platform bus models at all, which can result in very significant speed improvements with complex platforms and workloads.

  See Fast Models User Guide for more information.

• Cortex-A78C is included in the main package.

• The combination of RHEL 6 and GCC6.4 is no longer supported.

Notice

• To install the package without the need for user interaction, use the --i-accept-the-end-user-license-agreement command-line option.

  Note that using this option means you have read and accepted the terms and conditions of the End User License Agreement for the product and version installed.

• Model Shell and the related SimGen and System Canvas targets (TARGET_MAXVIEW and TARGET_ISIM_DEPRECATED) are now deprecated. They will be removed in a future release.

• Fast Models scheduler deprecation:

  This notice is intended for users who build simulation platforms running on the Fast Models scheduler and not the SystemC scheduler.

  Note that all the platforms and models delivered as part of the Fast Models package already use the SystemC scheduler, so this change only affects users who build their own platforms using Fast Models tools.

  Support for the Fast Models scheduler will be dropped in a future release. This means that support for dependent targets will be removed and any SimGen projects that depend on the Fast Models scheduler will fail to build.

  To find out if a project depends on the legacy scheduler, search for TARGET_ISIM_DEPRECATED = 1 or TARGET_MAXVIEW = 1 in an sgproj (SimGen project) file.

  You are advised to migrate from the Fast Models scheduler targets TARGET_ISIM_DEPRECATED = 1 and TARGET_MAXVIEW = 1 to the SystemC targets TARGET_SYSTEMC_ISIM = 1 and TARGET_SYSTEMC_MAXVIEW = 1 respectively. Either regenerate the sgproj files using sgcanvas or manually replace the entries in each .sgproj file affected as soon as possible.

• CMN models .json file deprecation:

  Specifying a mesh topology by setting mesh_config_file to a .json file, as described in Fast Models Reference Manual is deprecated.

  From the next release, set mesh_config_file to the name of the yml configuration file generated by the Socrates tool.

• AEMv8-A platforms are deprecated and will soon be replaced by AEMvA platforms which enable the current v8-A architecture and Future Architecture Technologies, selectable using parameters.

  For more information, contact support@arm.com

• The trace fields for PVBusLogger have changed to include ExtendedID. Refer to the documentation.

• FastRAM and trace enabling:

  • If you start the configuration file with 'T' and never use 'Q', then there will be trace for FastRAM for all the initialization and runtime.

  • If you end the file with 'T' and never use 'Q', then there will be trace for FastRAM for all runtime and not initialization.

  • If you start the file with 'T' and end the file with 'Q', then trace will be enabled only during FastRAM initialization.

  • Add one or more occurrences of 'T' and 'Q' in the file to trace parts of the initialization, according to where they occur in the file.

Fast Models limitations

This section contains limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• FastModels 11.13 adds a rel version of the GIC600-AE model supporting register accesses to the fault management unit and the RAS component, with the following functionality expectations:

  • FMU registers are enabled for read and write access with correct reset value.

  • Only secure-access is allowed for FMU registers.

  • Locking mechanism is based on FMU_KEY for FMU register write.

  • APB4 port from safety island to access FMU registers.

  • RAS registers are enabled for read and write access with correct reset value.

  • Parameters to set GICT_ERR<n>FR to individually enable error reporting are supported:

    • RAS-CFI-support: enable fault handling interrupt for corrected error.
    • RAS-UE-support: enable reporting for in-band uncorrected error.
    • RAS-FI-support: enable fault handling interrupt.
    • RAS-UI-support: enable error recovery interrupt for uncorrected error.

  • Access control for RAS registers is based on GICD_SAC. For the reset value, use parameter gict-allow-ns-reset.

  The GIC600-AE model has the following limitations:

  • Actual mechanism of FMU is not implemented yet such as ping/ack control.

  • Actual mechanism of RAS is not implemented yet such as getting notified by wrong ITS configuration or software error.

  • SPI collator is not supported.

  • po_reset signal with model is used for dbg_reset.

  • There is no domain reset.

  FastModels 11.13 adds support for the GIC600-AE registers GICR_CLASSR, GICD_ICLAR and read/write access to the register GICR_FCTLR, in addition to the reporting of the following RAS error types:

  • Software error record 0 for Redistributor on LPI: SYN_ITS_REG_SET_OOR, SYN_ITS_REG_CLR_OOR, SYN_ITS_REG_INV_OOR, SYN_ITS_REG_SET_ENB, SYN_ITS_REG_CLR_ENB, SYN_ITS_REG_INV_ENB.

  • Software error record 0 for Redistributor on configuration: SYN_ACE_BAD, SYN_PPI_PWRDWN, SYN_PPI_PWRCHANGE, SYN_GICR_ARE, SYN_PROPBASE, SYN_PENDBASE_ACC, SYN_LPI_CLR, SYN_WAKER_CHANGE, SYN_SLEEP_FAIL, SYN_PGE_ON_QUIESCE, SYN_PT_PROP_READ_FAIL.

  • Software error record 0 for Redistributor on table access: SYN_LPI_PROP_READ_FAIL, SYN_PT_TABLE_READ_FAIL, SYN_PT_TABLE_WRITE_FAIL.

    • Only Reading properties for individual LPIs, not block of LPIs, is modeled. Hence the reporting of the error types SYN_PT_PROP_READ_FAIL, SYN_PT_SUB_TABLE_READ_FAIL and SYN_PT_TABLE_WRITE_FAIL_BYTE is not modeled.

    • The reporting of the error types SYN_PT_COARSE_MAP_READ_FAIL and SYN_PT_COARSE_MAP_WRITE_FAIL is not modeled.

  • Software error record 0 for Distributor: SYN_ACE_BAD, SYN_GICR_ARE, SYN_GICD_CTLR, SYN_SGI_NO_TGT, SYN_SPI_BLOCK, SYN_SPI_OOR, SYN_SPI_NO_DEST_TGT, SYN_DEACT_IN, SYN_SPI_CHIP_OFFLINE, SYN_SPI_NO_DEST_IOFN.

    The reporting of the error type SYN_GICD_CORRUPTED is not modeled.

  • Software error record 0 for ITS: SYN_ACE_BAD.

    The reporting of the error type SYN_ITS_OFF is not modeled.

  • Software error record 13 for MAP* commands: MAPD_DEVICE_OOR, MAPD_ITTSIZE_OOR, MAPC_COLLECTION_OOR, MAPC_TGT_OOR, MAPC_LPI_OFF, MAPI_DEVICE_OOR, MAPI_COLLECTION_OOR, MAPI_ID_OO, MAPI_UNMAPPED_DEVICE, MAPVI_DEVICE_OOR, MAPVI_COLLECTION_OOR, MAPVI_UNMAPPED_DEVICE, MAPVI_ID_OOR, MAPVI_PHYSICALID_OOR.

    The reporting of the error type MAPC_CHIP_OFFLINE_OOR is not modeled.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC 4.9.2.
• RedHat 7 with GCC 6.4.0 and GCC 4.9.2.
• Ubuntu 16.04 with GCC 6.4.0 and GCC 7.3.0.
• Ubuntu 18.04 with GCC 7.3.0.
• Windows 10 with Visual Studio 2017 version 15.9.11 or later.
• Windows 10 with Visual Studio 2019 version 16.7.3 or later.
• The following Visual Studio components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
• Windows SDK version 10.0.16299.0 or later is required for Visual Studio 2019 support.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.12 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• There is no log output from an FVP using the --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES =1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.13:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.12 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.12

• Support has been added for the following CPUs and System IP:

  • Cortex-M33 r1

  • MMU-700

  • CMN-650

  • GIC-600AE

• A new branch prediction plugin has been added which supports the following features:

  • Running various branch predictor algorithms.

  • Logging the overall performance of a specified branch predictor.

  • Logging the performance of every branch.

  • MTI trace events.

  • Integration with PMU counters.

  • Integrating a user-defined predictor.

• Neoverse N2, Cortex-R82, and GIC-700 models are at beta stage and are not included in the main package. Contact support@arm.com for more information.

• VirtioNet has been enhanced to expose Hostbridge CADI and Iris debug interfaces.

• We have removed support for PyCADI. It has been replaced by iris.debug. See the documentation for information on migrating from fm.debug to iris.debug: Iris Python Debug Scripting User Guide

• To install the package without the need for user interaction, use the new --i-accept-the-end-user-license-agreement command-line option.

  Note: using this option means you have read and accepted the terms and conditions of the End User License Agreement for the product and version installed.

  This option can be followed by either or both of these options:

  • --basepath <path>. Set the base directory for the installation.

  • --licpath <path>. Set the location of the license file.

• SimGen now requires sgproj files to explicitly set a target.

Notice

• Support for Android 10 GGA/GRM will be available in a future release pending an upstream patch. Contact support@arm.com for current status.

• The number of ports in many CPUs is expected to change in the next release, Fast Models 11.13.

• Fast Models scheduler deprecation:

  This notice is intended for users who build simulation platforms running on the Fast Models scheduler and not the SystemC scheduler.

  Note that all the platforms and models delivered as part of the Fast Models package already use the SystemC scheduler, so this change only affects users who build their own platforms using Fast Models tools.

  Support for the Fast Models scheduler will be dropped in March 2021. This means support for dependent targets will be removed and any Simgen projects that depend on the Fast Models scheduler will become obsolete.

  To find out if a project depends on the legacy scheduler, look for TARGET_ISIM_DEPRECATED = 1 in the sgproj (simgen project) file. Plan to migrate them to the SystemC target TARGET_SYSTEMC_ISIM = 1 by either regenerating them using sgcanvas or manually replacing TARGET_ISIM_DEPRECATED with TARGET_SYSTEMC_ISIM, depending on how they were created.

• CLREXMON(REQ/ACK)signals will be removed from DynamIQ DSU-based models in a future release.

• The Fastline feature supported by FastlineTrace.so is deprecated in this release and will be removed from the product in a future release.

• In 2018, the CADI debug interface was deprecated and is being replaced by the new Iris debug interface. Removal of the CADI debug interface from the product was planned for Q4 2020, but is being delayed to give customers more time to migrate to Iris. Watch for subsequent release note entries related to the new removal date of CADI.

• If you are using floating licenses, this version of Fast Models requires FLEXnet server version 11.16.6.0 or later. See instructions below for obtaining the server.

• The planned removal of GCC 4.9.2 has been extended to the Q1 2021 Fast Models release. The Q1 2021 Fast Models release will be the last release to support GCC 4.9.

• Visual Studio 2015 will be removed in the Q4 2020 Fast Models release.

• RHEL6 will be removed in the Q4 2020 Fast Models release.

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• When checking the components in Iris for the FVP_Base_Cortex-A57x1, an issue has been found with the names of GICv3 CPU interface components. Their names might not be correct.

• Building Fast Models with gcc version 7.3.1 causes link errors and hence gcc version 7.3.1 is not supported.

• There is an issue with Iris not exposing the IPA memory space, which will be resolved in the next release (FM 11.13).

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

  • Deprecated FASTSIM_CMN_INTERNAL_RNSAM. Use model parameter force_rnsam_internal instead. Note that force_rnsam_internal is TRUE by default now. If this parameter is FALSE and the topology has a RNFxESAM, the external bit (bit[31]) of the RNSAM children pointer will be enabled. This bit is the only functionality governed by this parameter.

  • Added a new parameter enable_rnsam_to_hnf_wider_hash to enable support for wider hashes for the RNSAM to HNF communication. If this variable is enabled, then bits[47:6] from the PA are used in the hashing function. By default, bits[47:12] are used.

  • Removed parameter enable_snf_hashing.

  • Deprecated the following environment variables. Use the newly added parameters print_cmn_config, print_cmn_ccix_config, and skip_cmn_confing_check instead:

    • FASTSIM_CMN_DUMP_CONFIG

    • FASTSIM_CCIX_CONFIG_DUMP

    • FASTSIM_CMN_SKIP_CONFIG_CHECK

  • The following parameters are deprecated and will be removed in the next release. Update the mesh topology file to move devices.

    • default_hni_port

    • rnf_index_to_nodeid

    • rni_index_to_nodeid

    • rnd_index_to_nodeid

    • snf_index_to_nodeid

    • sbsx_index_to_nodeid

    • hni_index_to_nodeid

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC-6.4.0 and GCC-4.9.2.
• RedHat 7 with GCC-6.4.0 and GCC-4.9.2.
• Ubuntu 16.04 with GCC-6.4.0 and GCC-7.3.0.
• Ubuntu 18.04 with GCC-7.3.0.
• Windows 10 with Visual Studio 2015 - Update 3 and Visual Studio VS2017 - version 15.9.11 or later.
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
  Notice to users of Visual Studio 2019. Although vc2019 is not yet supported, you can still use vc2017 with Visual Studio 2019. For instructions, see the Fast Models User Guide.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.12 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.12:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

This is an incremental build of Fast Models 11.11. We are making the Fast Models 11.11.1 point release to fix the following issues:

• Fixed a fatal error when connecting the GIC-600 in a multichip configuration.
• Missing SVE2 functionality in the Foundation Platform and Base Platform RevC FVPs. SVE2 is now enabled and the models can be downloaded at Armv8-A Architecture Envelope Models (AEM)
• Corrected an occasional internal fault (segfault) at model startup due to incorrect handling of a failure mode within the event backend.

If you have questions about any of these issues, please contact support-esl@arm.com.

The next Fast Models release (11.12) is planned for the second half of September 2020.

Fast Models Portfolio 11.11 Release Notes (replicated here for convenience)

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.11 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.11

• Support for Custom Datapath Extension (CDE) for Armv8-M and example plugins for generating custom instructions for Cortex-M33.

• Support for the Cortex-A78 and Cortex-X1 CPUs.

• The supported Accellera SystemC version is now 2.3.3.

• If you are using floating licenses, this version of Fast Models requires FLEXnet server version 11.16.6.0 or later. See instructions below for obtaining the server.

• Windows 7 support has been removed. See the list of supported host operating systems below.

Notice

• We are delaying the end of life of the CADI debug interface past our Q2 2020 release to give users more time to transition. The new end of life date will likely be our Q4 2020 release. The new date will be confirmed in our release note at least one quarter prior to removal.

• We are deprecating support for PyCADI and removing support in the Q2 2020 release. PyCADI will be replaced by iris.debug. Refer to the documentation for information on migrating from fm.debug to iris.debug: Iris Python Debug Scripting User Guide.

• The planned removal of GCC 4.9.2 has been extended to the Q4 2020 Fast Models release. The Q3 Fast Models release will be the last release to support GCC 4.9.

• Visual Studio 2015 will be removed in the Q3 2020 Fast Models release.

• RHEL6 will be removed in the Q3 2020 Fast Models release.

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC-6.4.0 and GCC-4.9.2.
• RedHat 7 with GCC-6.4.0 and GCC-4.9.2.
• Ubuntu 16.04 with GCC-6.4.0 and GCC-7.3.0.
• Ubuntu 18.04 with GCC-7.3.0.
• Windows 10 with Visual Studio 2015 - Update 3 and Visual Studio VS2017 - version 15.9.11 or later.
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
  Notice to users of Visual Studio 2019. Although vc2019 is not yet supported, you can still use vc2017 with Visual Studio 2019. For instructions, see the Fast Models User Guide.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.11 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• No log output from an FVP using --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES=1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.11:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.11 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC.

Enhancements and changes in Fast Models Portfolio 11.11

• Support for Custom Datapath Extension (CDE) for Armv8-M and example plugins for generating custom instructions for Cortex-M33.

• Support for the Cortex-A78 and Cortex-X1 CPUs.

• The supported Accellera SystemC version is now 2.3.3.

• If you are using floating licenses, this version of Fast Models requires FLEXnet server version 11.16.6.0 or later. See instructions below for obtaining the server.

• Windows 7 support has been removed. See the list of supported host operating systems below.

Notice

• We are delaying the end of life of the CADI debug interface past our Q2 2020 release to give users more time to transition. The new end of life date will likely be our Q4 2020 release. The new date will be confirmed in our release note at least one quarter prior to removal.

• We are deprecating support for PyCADI and removing support in the Q2 2020 release. PyCADI will be replaced by iris.debug. Refer to the documentation for information on migrating from fm.debug to iris.debug: Iris Python Debug Scripting User Guide.

• The planned removal of GCC 4.9.2 has been extended to the Q4 2020 Fast Models release. The Q3 Fast Models release will be the last release to support GCC 4.9.

• Visual Studio 2015 will be removed in the Q3 2020 Fast Models release.

• RHEL6 will be removed in the Q3 2020 Fast Models release.

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC-6.4.0 and GCC-4.9.2.
• RedHat 7 with GCC-6.4.0 and GCC-4.9.2.
• Ubuntu 16.04 with GCC-6.4.0 and GCC-7.3.0.
• Ubuntu 18.04 with GCC-7.3.0.
• Windows 10 with Visual Studio 2015 - Update 3 and Visual Studio VS2017 - version 15.9.11 or later.
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.
  Notice to users of Visual Studio 2019. Although vc2019 is not yet supported, you can still use vc2017 with Visual Studio 2019. For instructions, see the Fast Models User Guide.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.11 requires FLEXnet server version 11.16.6.0 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• No log output from an FVP using --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES=1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.11:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.10 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.10

• Support for the Cortex-M55 CPU.

• Support for GCC 7.3 on Ubuntu 18.04 LTS and RHEL 7. Instructions for installing GCC are at Installing GCC.

• Support for the Corstone SSE-300 platform.

• Generic Graphics Accelerator (GGA) now supports Android 9.

Notice

• We are adding support for Accellera SystemC version 2.3.3 in the Q2 2020 release. The optional deployment of Accellera SystemC will be updated to version 2.3.3 in the Q2 2020 release.

• We are delaying the end of life of the CADI debug interface past our Q2 2020 release to give users more time to transition. The new end of life date will likely be our Q4 2020 release. The new date will be confirmed in our release note at least one quarter prior to removal.

• We are deprecating support for PyCADI and removing support in the Q2 2020 release. PyCADI will be replaced by iris.debug. Refer to the documentation for information on migrating from fm.debug to iris.debug: Iris Python Debug Scripting User Guide.

• The planned removal of GCC 4.9.2 has been extended to the Q4 2020 Fast Models release. The Q3 Fast Models release will be the last release to support GCC 4.9.

• Windows 7 support will be removed in the Q2 2020 Fast Models release.

• Visual Studio 2015 will be removed in the Q3 2020 Fast Models release.

• RHEL6 will be removed in the Q3 2020 Fast Models release.

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6 with GCC-6.4.0 and GCC-4.9.2.
• RedHat 7 with GCC-6.4.0 and GCC-4.9.2.
• Ubuntu 16.04 with GCC-6.4.0 and GCC-7.3.0.
• Ubuntu 18.04 with GCC-7.3.0.
• Windows 7 with Visual Studio 2015 - Update 3.
• Windows 10 with Visual Studio 2015 - Update 3 and Visual Studio VS2017 - version 15.9.11 or later.
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

If you are using floating licenses, Fast Models 11.10 requires FLEXnet server version 11.14.1.0 or later. The next release of Fast Models will require FLEXnet server version 11.16.5 or later. Please plan to upgrade your license server accordingly.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • On Windows hosts, a Linux target OS running Wayland has known issues.

• No log output from an FVP using --iris-log option. There is a workaround by setting the environment variable IRIS_GLOBAL_INSTANCE_LOG_MESSAGES=1 to enable logging.

• Setting R52 flash and llpp size to zero is not sufficient to make them unrouteable.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.10:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

• CCN5xx models do not expose CCNCache sub-component parameters in System Canvas.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.9 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.9

• Fast Models supports Armv8.6-A features

• We have added beta support for GCC 7.3

• We have added Wayland Client support to GGA/GRM

• As part of our licensing simplification project, Fast Models from 11.7 onwards updates the End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Fast Models support policy with regard to Python is aligned with the official Python support. See the following link for the schedule of Python releases: Status of Python branches

  In particular, Fast Models does not guarantee support for any Python version that has reached end of life according to the schedule of the Python community.

• We have deprecated support for Windows 7 and will remove support in the Q1 2020 release

• We have deprecated support for Accellera SystemC version 2.3.1 and will remove support in the Q1 2020 release

• We have deprecated support for Ubuntu 14.04 and will remove support in the Q1 2020 release

• We have deprecated support for GCC 5.X compilers and will remove support in the Q1 2020 release

• We are shipping FVPs built with compilers gcc-6.4 and VisualStudio 2017. This change is applied to build system projects SysGen:Models, SysGen:SubSystemModels and SysGen:ModelPackages

• New tutorial added to Fast Models User Guide: Building Fast Models

• Graphics Acceleration in Fast Models chapter in Fast Models User Guide has been rewritten

Notice

• The planned deprecation of GCC 4.9.2 has been extended to Q4 2020 Fast Models release.

• We plan to update ffmpeg to 4.1.3. This will only affect users of the Mali video processor models.

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from the Fast Models releases no earlier than Nov 2019.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, libtinfo-dev needs to be installed on Ubuntu 16.04.

• The cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• GCC-7.3
• Visual Studio 2015 - Update 3
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware requirements for Generic Graphics Accelerator (GGA)

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.9 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Earlier versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• GGA issues:

  • GGA-only mode is not supported on Linux targets in this release

  • On Windows hosts, only Android targets are supported. To simulate Linux (non-Android) distributions, you must be running a Linux host

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.9:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• Cortex-A53, Cortex-A35 and Cortex-A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at the cluster level, not at the cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

Many of the examples in Fast Models Portfolio 11.8.1 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.8.1

• From 11.8.1 Arm will periodically collect anonymous information about the usage of our products to understand and analyze what components or features you are using, with the goal of improving our products and your experience with them. Product usage analytics contain information such as system information, settings, and usage of specific features of the product but do not include any personal information. For details of the data being collected, see Fast Models User Guide.

  There are two ways to control the analytics feature:

  • Environment Variable: Set the ARM_DISABLE_ANALYTICS environment variable to a non-zero value to disable analytics gathering, or to zero to enable it, for all invocations.

  • Command Line: To control the analytics feature, use the --enable-analytics or --disable-analytics command-line options to enable or disable analytics gathering for the current invocation.

  The environment variable overrides the command-line entry.

• Fixed in 11.8.1: Problem with debug accesses on AMBAPVACE2PVBus transactions.  Assertion (address & (buffer->getAccessWidthInBytes() - 1)) == 0 for byte aligned debug write

• Fixed in 11.8.1: Simulation stuck at before_end_of_elaboration()

• Fixed in 11.8.1: Iris doesn't list SVE registers

• Fixed in 11.8.1: irisCall().resource_getListOfResourceGroups() hangs when called from a debugger thread

• Fixed in 11.8.1: Crash on exit triggered by order of command line args

• The default value of cache_state_modelled on the CMN600 model has changed from true to false. If you need cache state modelling enabled on the CMN600 please set it explcitly.

• As part of our licensing simplification project, Fast Models from 11.7 onwards updates the End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

Notice

• The planned deprecation of GCC 4.9.2 has been extended to Q4 2020 Fast Models release.

• We plan to deprecate Ubuntu 14.04 in the 11.9 release.

• We plan to update ffmpeg to 4.1.3. This will only affect users of the Mali video processor models.

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from the Fast Models releases no earlier than Nov 2019.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on limitations for models that are new in this release or new limitations that have been identified for existing models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware Requirements for Generic Graphics Accelerator / GGA

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.8.1 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.8.1:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.8 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.8

• The default value of 'cache_state_modelled' on the CMN600 model has changed from true to false. If you need cache state modelling enabled on the CMN600 please set it explcitly.

• As part of our licensing simplification project, Fast Models from 11.7 onwards updates the End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Support for multi-chip operation has been added to the GIC-600 Fast Model. The GIC-600 Fast Model is aligned with the r1p6 version of the RTL implementation except that RAS support and P/Q Channel are not supported. The parameters for the model enable selection between r1 and r0 features in the controller.

• PSTATE tracing has been added to the Fast Models for DynamIQ cores to determine why prequests are accepted/denied.

• Support has been added for ImpDef RAS registers in the Neoverse-N1 Fast Model.

• zlib has be updated to version 1.2.11.

Notice

• The planned deprecation of GCC 4.9.2 has been extended to Q4 2020 Fast Models release.

• We plan to deprecate Ubuntu 14.04 in the 11.9 release.

• We plan to update ffmpeg to 4.1.3. This will only affect users of the Mali video processor models.

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from the Fast Models releases no earlier than Nov 2019.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.
  • The following CML (Coherent Multi-chip Links) r3 features are supported:
    • LDID-based CML routing
    • CCIX port aggregation support
    Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware Requirements for Generic Graphics Accelerator / GGA

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.8 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.8:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.7 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.7

• For 11.7.1, a new port, chip_id, has been added to all GIC600 model versions to implement multichip operation, which is supported in GIC600 r1p2 and later. Writes to it are ignored for earlier GIC600 versions.
• For 11.7.1, a new parameter, redistributor-power-managed-by-pwrr, has been added to the GIC600 model. If true (default), GIC600 redistributor power management is controlled by the GICR_PWRR register. If false, this behavior is disabled, to support backwards compatibility.

• As part of our licensing simplification project, Fast Models 11.7 updates the End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Support for Cortex-A65 and Cortex-A77 Fast Models and platforms.

• Support for Cortex-M33 and AEMv8M co-processor.

• Support for Component Aggregation Layer (CAL) has been added to the CMN-600 model.

• Full support for VC2017 has been added in this release. For a full list of supported platforms, see the list below entitled "Compilers and Operating Systems supported by Fast Models".

• Armv8.5-A support is available at Release quality.

• Cortex-R52 - the HRMR.RR bit now raises signal WARMRSTREQx. In other words, a request is generated to reset the controller to handle the warm reset. If this pin is not connected in a platform then the core does the self reset.

Notice

• We plan to deprecate GCC 4.9.2 in the 11.8 release.

• We plan to deprecate Ubuntu 14.04 in the 11.8 release.

• We plan to update zlib to 1.2.11 and ffmpeg to 4.1.3. This will only affect users of the Mali video processor models.

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware Requirements for Generic Graphics Accelerator / GGA

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.7 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• Semihosting hangs with Iris clients. Running a workload on a core model that attempts to read semihosted input, with an external Iris client attached to the model, might cause the model to hang indefinitely.
• PMU registers mismatch. SPE register space is not fully compliant yet.
• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.7:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load, this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35, and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.7 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.7

• As part of our licensing simplification project, Fast Models 11.7 updates the End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Support for Cortex-A65 and Cortex-A77 Fast Models and platforms.

• Support for Cortex-M33 and AEMv8M co-processor.

• Support for Component Aggregation Layer (CAL) has been added to the CMN-600 model.

• Full support for VC2017 has been added in this release. For a full list of supported platforms, see the list below entitled "Compilers and Operating Systems supported by Fast Models".

• Armv8.5-A support is available at Release quality.

• Cortex-R52 - the HRMR.RR bit now raises signal WARMRSTREQx. In other words, a request is generated to reset the controller to handle the warm reset. If this pin is not connected in a platform then the core does the self reset.

Notice

• We plan to deprecate GCC 4.9.2 in the 11.8 release.

• We plan to deprecate Ubuntu 14.04 in the 11.8 release.

• We plan to update zlib to 1.2.11 and ffmpeg to 4.1.3. This will only affect users of the Mali video processor models.

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• Improvements to ClockTimer[64] component to ensure clocks run correctly when switching frequencies:

  Previously, it was possible for a Clock component to run even if the connection to the clk_in input was missing. This is no longer possible and designs that erroneously relied on the old behavior might not function correctly. For example, software running on the design might hang.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and includes CAL (Component Aggregation Layer) functionality that was added in r3p0.
  • The model supports a new revision parameter to select between r1p1 and r3p0 implementations.
  • CAL r2 and r3 features are supported. Further testing of these features is planned.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017. The following Visual Studio 2017 components are required:
  • Visual C++ ATL for x86 and x64.
  • Visual C++ MFC for x86 and x64.

Hardware Requirements for Generic Graphics Accelerator / GGA

GGA has been validated on the NVIDIA GT 730 or later graphics cards with the following driver versions:

• 390.77 and above for Ubuntu.
• 390.77 and above for Windows.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.7 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• Semihosting hangs with Iris clients. Running a workload on a core model that attempts to read semihosted input, with an external Iris client attached to the model, might cause the model to hang indefinitely.
• PMU registers mismatch. SPE register space is not fully compliant yet.
• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.7:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load, this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35, and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.6 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.6

• Added support for Cortex-A65AE and Cortex-A76AE Fast Models and platforms.

• As part of our licensing simplification project, Fast Models 11.6 introduces a revised End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Support for the Neoverse N1 platform and the Neoverse E1 platform with Fast Models and FVPs for the Neoverse-N1 and Neoverse-E1 CPUs.

• Support for VC2017 at Alpha level has been added in this release. Full support for VC2017 is planned for the 11.7 (Q2'2019) release of Fast Models. For a full list of supported platforms, see the list below (entitled "Compilers and Operating Systems supported by Fast Models")

• Armv8.5-A support is available at Release quality, with the exception of complete Memory Tagging (MTE) functionality, which will be available in Fast Models 11.7 (Q2'2019).

• Armv8.1-M support, including the Helium vector extensions.

Notice

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and does not include functionality added by r2p0 or r3p0.
  • There are limitations in the CAL (Component Integration Layer) feature, which does not yet function properly with more than 4 devices.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017 (Alpha)
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.6 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.6:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load, this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35, and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the Docs subfolder for Fast Models Portfolio and at https://developer.arm.com/products/system-design/fast-models/docs.

A significant number of the examples in Fast Models Portfolio 11.6 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images means that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.2.

Enhancements and changes in Fast Models Portfolio 11.6

• As part of our licensing simplification project, Fast Models 11.6 introduces a revised End User License Agreement (EULA). The new EULA aligns with other Arm software products, giving a consistent set of terms and conditions across products.

• Support for the Neoverse N1 platform and the Neoverse E1 platform with Fast Models and FVPs for the Neoverse-N1 and Neoverse-E1 CPUs.

• Support for VC2017 at Alpha level has been added in this release. Full support for VC2017 is planned for the 11.7 (Q2'2019) release of Fast Models. For a full list of supported platforms, see the list below (entitled "Compilers and Operating Systems supported by Fast Models")

• Armv8.5-A support is available at Release quality, with the exception of complete Memory Tagging (MTE) functionality, which will be available in Fast Models 11.7 (Q2'2019).

• Armv8.1-M support, including the Helium vector extensions.

Notice

• The folder structure in Fast Models Portfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

• Support for MxScript will be removed from Model Debugger in a future release. Use Iris Python Debug Scripting instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the first subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from the Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620 Dynamic Memory Controller Fast Model:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600 Coherent Mesh Network:

  • The model implements version r1p1 of the RTL specification and does not include functionality added by r2p0 or r3p0.
  • There are limitations in the CAL (Component Integration Layer) feature, which does not yet function properly with more than 4 devices.

• Pipeline Model plug-in:

  For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• Visual Studio 2017 (Alpha)
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.6 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 18.07 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A (examples):

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A (examples):

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used might not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.6:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load, this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35, and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program that dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• Model Debugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• Neoverse-N1/Neoverse-E1 Fast Models:

  • DBGEN, SPIDEN, NIDEN, and SPIDEN signals in the model have per-core instances instead of per-cluster.
  • The cfgsdisable signal will be removed in a future release.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.5 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.5

Fast Models now uses SystemC 2.3.2. Refer to Accellera SystemC 2.3.2 release notes for more information.

Support for GCC-4.8.3, GCC-4.8.4, and VC2013 has been removed. For a full list of supported platforms, see the list below entitled "Compilers and Operating Systems supported by Fast Models".

Support for ARMv8.5 features is provided at beta quality. The Memory Tagging extension feature is a work in progress. It is disabled by default.

A component, AHCI_PCI, exists for the PCI subsystem, that may be used to load disk images.

The FVP_Base_AEMv8A-AEMv8A-DP550-V61 example platform has been removed.

The FVP_Base_RevC-2xAEMv8A example platform now contains an AHCI controller. For more information on loading a disk image, see https://developer.arm.com/docs/100964/latest/base-platform/base-platform-revc/baseplatformpcirevc-component.

We are pleased to announce the release of the Iris debug API. Iris has been at Beta stage with ongoing testing for more than a year and has now reached a quality level suitable for general release. The Iris debug API is a replacement for the CADI debug API. CADI is now deprecated but will continue to exist alongside Iris as an optional debug API until end-of-life and removal in May 2020.

In addition to the debug functionality that was available in CADI, the Iris API also provides support for event tracing with similar functionality to the existing MTI API. This feature is currently at Beta quality because the in-process performance of Iris trace is significantly slower than MTI. Plans are in place to improve performance of Iris trace in a later release. The out-of-process trace that Iris supports was not possible with MTI or CADI so performance cannot be compared.

Timing annotation latency fields have been added to cache MTI trace sources.

DMI regions greater than 4GB in size are now used correctly inside the AMBA-PV bridges.

A problem with local time when using VFP instructions with Cortex-M models has been fixed.

Notice

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The TxThread.h and TxRunnable.h supplied headers, and the TxThread and TxRunnable types, are deprecated and will be removed from the product in the future. Use the standard library thread facilities instead.

Fast Models limitations

This section contains information on model limitations for models that are new in this release or new limitations that have been identified for previously released models.

For more information, refer to the Fast Models Reference Manual at: https://developer.arm.com/docs/100964/latest.

• DynamIQ (FCM):

  For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in the 1st subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600:

  • The model implements version r1p1 of the RTL specification and does not include functionality added by r2p0 or r3p0.
  • There are limitations in the CAL (Component Integration Layer) feature, which does not yet function properly with more than 4 devices.

• For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed on Ubuntu 16.04.

• cp15sdisable port/parameter is removed from some cores that do not support AArch32 at EL3.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2015 - Update 3
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.5 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding issues

• There is a performance issue with in-process trace using Iris compared to trace using MTI.

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.5:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• When semihosting is enabled on a SystemC model and a read from stdin is done within the target software, the semihosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semihosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35, and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• DynamIQ does not support all cluster models.

• On Linux, a program which dynamically loads a model shared object file using dlopen() must be linked with the pthread library (-lpthread), even if the program is otherwise single-threaded. Failure to do so may result in a segmentation fault, or other abnormal termination, possibly with the message 'Enable multithreading to use std::thread: Operation not permitted', depending on the libstdc++ version. The underlying defect is a libstdc++ bug (#67791) which has been exposed by migrating the model to C++11 threads.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Notice of planned change to licensing terms

The calendar year Q1 2019 release of Fast Models will include a revised End User License Agreement (EULA). If you would like to preview the new EULA prior to the next release, contact your supplier.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.4.2 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.4.2

GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) can work together to help graphics software stack verification in Fast Models 11.4.2. GRM implements ARM Mali graphics hardware without shader support and it can work with or without GGA. With GGA support, the end-user can view the rendering result in the Fast Models visualization window, and can use the error code checking feature to verify app correctness.

New in this release:

Added support for Mali-G76 register model. The model supports integrating the Mali Software DDK and running OpenGL ES client applications on the model. See "Integration Guidance for GRM" for more information about incorporating a GPU model.

Graphics APIs supported:

• GLES
  • v2.0
  • v3.0
  • v3.1
• Vulkan
  • 1.0.42

Preferred host GPU hardware and driver:

• If the target implements OpenGL ES APIs without Vulkan, the host can use any of the following graphics cards with drivers that support OpenGL 4.3 and above:
  • The preferred graphics card is NVIDIA GTX 1050 with driver versions:
    • 340.96 and above for Ubuntu
    • 340.66 and above for Windows
  • AMD graphics card R7 240 with driver versions:
    • 15.30 and above released by AMD officially, for Ubuntu.
    • 15.12 and above for Windows.
  • Intel HD graphics card HD Graphics 530 with driver versions:
    • Not available for Ubuntu.
    • 10.18.15.4279 for Windows.
• To support Vulkan APIs, the preferred graphics card is NVIDIA GTX 1050 graphics card with driver versions:
  • 384.59 and above for Ubuntu.
  • 384.94 and above for Windows.

Target GPUs supported for GRM:

• Mali-G76
• Mali-G71
• Mali-G72.
• Mali-G51. Verified with bifrost-kernel r7p0-01rel0 and corresponding gralloc module

Integration guidance for GRM:

• The source code for the SGM-775 System Guidance Mobile platform is provided as an example. This platform incorporates the Mali-G72 GRM, and illustrates how the model can be integrated into a platform. All supported GPU models have identical interfaces to the Mali-G72. The sources can be found at FastModelsPortfolio_11.4/examples/LISA/CSS/Build_Kits3_SGM_775_Example.

• Firmware and scripts for booting this platform are not included in this distribution, but can be obtained directly from Arm by following the instructions at https://developer.arm.com/products/system-design/system-guidance/system-guidance-for-mobile. Note that the firmware distribution scripts support only Linux as a host platform.

• The Mali Graphics DDK source and builds can be obtained at https://connect.arm.com/browse/Systems IP/Graphics.

Notice

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are deprecated. They will be removed from Fast Models in a future release.

• Support for compiler Visual Studio 2013 will be removed in the Nov '18 release.

• Support for compilers GCC-4.8.3 and GCC-4.8.4 will be removed in the Nov '18 release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The example platform FVP_Base_AEMv8A-AEMv8A-DP550-V61 will be removed in the next release.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.8.3 and GCC-4.8.4
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2013 - Update 4
• Visual Studio 2015 - Update 3
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.4.2 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CTModel issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.4.2:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration
  Cache state modelling is on in my_platform.cci
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• CADIExecReset is no longer supported and CADIExecGetResetLevels does not throw an error.

• DynamIQ does not support all cluster models.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.4 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.4

• Added support for Cortex-A76 CTModel with the following new FVPs:

  • Build_Cortex-A76
  • Build_Cortex-A76x1
  • Build_Cortex-A76x2
  • Build_Cortex-A76x4
  • Build_Cortex-A55+Cortex-A76
  • Build_Cortex-A55x4+Cortex-A76x2

• Added support for compiler GCC-6.4.0.

• GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) are not supported for Mali graphics processors in this release.

• Added support for Cortex-M35P CTModel with the file ARMCortexM35PCT.lisa. This package supports the Build_Cortex-M35P example FVP_MPS2 platform.

  Limitations:

  • The model does not implement any physical security features.
  • Bits[3:0] of the Anti-tampering Features Control Register are supported for read/write. No functionality is implemented.
  • Read/write access to the Anti-tampering Features Control Register is supported using SECKEY. No functionality is implemented.
  • Cache is not supported in the Cortex-M35P Fast Model.

Notice

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are now deprecated. They will be removed from Fast Models in a future release.

• Support for compiler Visual Studio 2013 will be removed in the Nov '18 release.

• Support for compilers GCC-4.8.3 and GCC-4.8.4 will be removed in the Nov '18 release.

• The zstdint.h and zinttypes.h supplied headers are deprecated and will be removed from the product in the future. Use the standard cstdint and cinttypes files instead.

• The example platform FVP_Base_AEMv8A-AEMv8A-DP550-V61 will be removed in the next release.

Fast Models limitations

• Cortex-A76:

  • BROADCASTCACHEMAINTPOU pin is not implemented.
  • COREINSTRRET,COREINSTRRUN,nPMBIRQ signals are not implemented.
  • 256-bit wide output transactions are not supported.
  • Error correction/detection features are not supported.
  • Self-test features (MBIST) are not supported.
  • Latency configuration is not supported.
  • Snoop filtering is not supported.
  • Cache stashing capability is not supported.

• CMN-600:

  • PMU counters are not supported (counter registers are implemented as RAZ).
  • All RNI and RND nodes control 3 interface ports. The other variants which control 2 or 1 ports are not supported.
  • QoS is not supported and all related registers are RAZ/WI.
  • Error injection and Error generation is not supported. All error registers are RAZ/WI.
  • Power/Clock/Interrupt signals are not supported.
  • HN-T nodes are not supported.
  • CAL (Core Aggregation Layer) always support up to 4 devices.
  • Atomic operations to noncachable/device regions are not supported.
  • By default, HNF hashing uses the address[12:MAX] instead of the actual address[6:MAX], due to the DMI mechanism in the model. Enable the parameter enable_snf_hashing to make hashing logic use the actual address[6:MAX].
  • There are no constraints on mesh sizing when XID_WIDTH and YID_WIDTH = 4.
  • RM-SAM GIC memory region is not supported.
  • The CML feature is not supported.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.8.3 and GCC-4.8.4
• GCC-4.9.2
• GCC-5.4.0
• GCC-6.4.0
• Visual Studio 2013 - Update 4
• Visual Studio 2015 - Update 3
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.4 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CTModel issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.4:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration
  Cache state modelling is on in my_platform.cci
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• CADIExecReset is no longer supported and CADIExecGetResetLevels does not throw an error.

• DynamIQ does not support all cluster models.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'doc' subfolder for Fast Models Tools and the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.3 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.3

• Support for ARMv8.4 architecture.

• Support for Mali-D71 display processor.

• GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) can work together to help graphics software stack verification in Fast Models 11.3. GRM implements ARM Mali graphics hardware without shader support and it can work with or without GGA. With GGA support, the end-user can view the rendering result in the Fast Models visulization window, and can use the error code checking feature to verify app correctness.

  Graphics APIs supported:

  • GLES
    • v2.0
    • v3.0
    • v3.1
  • Vulkan
    • 1.0.42

  Major Updates in Fast Models 11.3:

  • Adds IRQ trace support for all GRM variants.
  • Adds Vulkan GRM support (Beta).
  • Adds Mali Graphics Debugger (MGD) support on GGA and GRM (Beta).
  • Fixed a multiple processes/threads issue with Sidechannel when running GGA.
  • Fixed bugs with AFBC encoding. Verified with bifrost-kernel r2p0-03rel0 and corresponding gralloc module.

  Preferred host GPU hardware and driver:

  • If the target implements OpenGL ES APIs without Vulkan, the host can use any of the following graphics cards with drivers that support OpenGL 4.3 and above:
    • The preferred graphics card is NVIDIA GT 730 with driver versions:
      • 340.96 and above for Ubuntu
      • 340.66 and above for Windows
    • AMD graphics card R7 240 with driver versions:
      • 15.30 and above released by AMD officially, for Ubuntu.
      • 15.12 and above for Windows.
    • Intel HD graphics card HD Graphics 530 with driver versions:
      • Not available for Ubuntu.
      • 10.18.15.4279 for Windows.
  • To support Vulkan APIs, the preferred graphics card is NVIDIA GTX 1050 graphics card with driver versions:
    • 384.59 and above for Ubuntu.
    • 384.94 and above for Windows.

  Target GPU supported for GRM:

  • Mali-G71
  • Mali-G72.
  • Mali-G51. Verified with bifrost-kernel r7p0-01rel0 and corresponding gralloc module

  Integration guidance for GRM:

  • The source code for the SGM-775 System Guidance Mobile platform is provided as an example. This platform incorporates the Mali-G72 GRM, and illustrates how the model can be integrated into a platform. The sources can be found at FastModelsPortfolio_11.3/examples/LISA/CSS/Build_Kits3_SGM_775_Example

  • Firmware and scripts for booting this platform are not included in this distribution, but can be obtained directly from Arm by following the instructions at https://developer.arm.com/products/system-design/system-guidance/system-guidance-for-mobile. Note that the firmware distribution scripts support only Linux as a host platform.

  • The Mali Graphics DDK source and builds can be obtained at https://connect.arm.com/browse/Systems IP/Graphics.

  Target OSes supported:

  • Android 4.4.2
  • Android 6.0.1
  • Android 7.0.0

  Outstanding issues:

  • Some limitations for Vulkan support:
    • Only nVidia graphics driver is verified on host.
    • Only core specification is supported.
  • The following issues are for GLES only. They depend on the Mali OpenGL ES Emulator:
    • Doesn't support GLES v3.1 AEP and v3.2.
    • GLES extension API shadow2DEXT can't be correctly supported in GLES Shading Language.
    • GLES APIs glTexSubImage and glCopyTexSubImage2D have errors for some special formats like GL_ALPHA.
    • Android applications using GPU resources in multi-threaded manner are not well supported and might lead to unpredictable behavior.
  • Some corner cases may fail on AMD and Intel HD Graphics cards due to native graphics driver issues.
  • For Intel HD Graphics card, a driver version above 10.18.15.4279 may bring unexpected failures for some corner cases.

  Limitations:

  • For applications that only do single frame rendering, the rendering result is invisible in the Fast Models visualization window.
  • The MMU inside the GPU can't be verified using GRM.

  Benchmark list verified:

  • Vulkan
    • Cube
    • Mali SDK Samples
    • Ice Cave for Vulkan
  • GLES
    • GLMark2
    • GFX Bench v2.7.5 and v3.0.11
    • AnTuTu 3D Rating
    • GPU Benchmark 3D v1.2.3
    • Unity Benchmark v1.1.1
    • Mali SDK Samples

• The ToggleMTIPlugin has been added. This plugin helps to register and unregister MTI callbacks thereby starting and stopping tracing activity during simulation.

• DRAM has been enhanced to accept routing of addresses in 52-bit address range.

• Replaced "-f" shorthand in SVP Platforms to mean "--config-file" instead of "--fast" to make it consistent with existing FVPs. Use "--fast" flag for fast mode.

Notice

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• The default parameter values for HostBridge and VirtioNet will change in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are now deprecated. They will be removed from the Fast Models releases no earlier than May 2018.

• TarmacTraceV8 has been removed. TarmacTrace plugin has been enhanced to replace TarmacTraceV8.

• Excessive license checkouts may appear in client license diagnostics (FLEXLM_DIAGNOSTICS=3). However, the correct number of licenses are actually checked out.

• VFS has been removed. Please use Virtio P9.

• ARM926, ARM968, ARM1136 and ARM1176 core models have been removed.

• SimGen issues warning W7538 when it detects all elements of a master port array are connected to a single slave port. Such fan-ins are valid, but are usually unintentional and can cause significant performance problems.

• Support for compilers GCC 4.8.3 and Visual Studio 2013 will be removed after the next release.

Fast Models limitations

• SMMUv3AEM :

  • No support for RAS.
  • No support for power control. No P- or Q-channels.
  • AMBA 'stash' operations and 'destructive read' operations are not supported on PVBus and also not by the device.
  • The PMU has limited functionality, only a subset of the architecturally mandatory events are supported (as indicated by the SMMU_PMCG_CEID0 fields). The PMU is only intended for demonstration purposes and for driver development.
  • No support for PCIe-NoSnoop transactions.
  • All of SMMUv3.0, SMMUv3.1 implemented except for limitations above.
  • All of SMMUv3.2 implemented except for Secure Virtualisation and limitations above.

• Mali-D71:

  • No support for Trusted layers.
  • No support for Image enhancements.
  • No Co-processor support for HDR processing.
  • No QoS support.
  • Extra ports have been provided for integration with SMMUv3.
  • The following configuration parameters are not available:
    • CONFIG_MAX_LINE_SIZE
    • CONFIG_DISPLAY_TBU_EN. TBUs are integrated separately using the given ports.
    • CONFIG_AFBC_DMA_EN. The ADU is present. If it is not used, do not program it.

• For the InOrder PipelineModel source example plugin, "libtinfo-dev" needs to be installed if on Ubuntu 16.04.s

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.8.3 and GCC-4.8.4
• GCC-4.9.2
• GCC-5.4.0
• Visual Studio 2013 - Update 4
• Visual Studio 2015 - Update 3
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.3 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CTModel issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.3:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration
  Cache state modelling is on in my_platform.cci
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• CADIExecReset is no longer supported and CADIExecGetResetLevels does not throw an error.

• DynamIQ does not support all cluster models.

• Repeated registering and deregistering MTI counters will eventually exhaust code cache.

• FCM clusters don't support cores with different LISA interfaces.

• Publishing of vfp-present parameter on Cortex-A75 is inconsistent.

• RVBARADDR is used to determine PC on reset even when core is resetting in AArch32.

• scx_get_parameter_list on a system with CMN600 will create warning.

• SystemC isim disables timing annotation by default.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

• When the Cortex-M33 and Cortex-M23 models are in Non-Secure state, they can fetch instructions from regions marked as NSC. This special case occurs when returning to a non-secure mode from a secure exception with the return address set to an NSC region which is not 1K aligned.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'doc' subfolder for Fast Models Tools and the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.2 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.2

• Support for ARMv8.4 (Beta) architecture.

• Support for Arm CoreLink MMU-600.

• PipelineModel plugins. The CPU pipeline models are a set of Fast Models plugins and buildable source code. Refer to the Arm Developer documentation by searching for PipelineModel. Currently, the Windows version of the plugins are not fully supported. This will be addressed in a future release.

  The CortexA53PipelineModel plugin is an approximation of the CortexA53 pipeline. It has been tested to run on an FVP CortexA53x1 platform on Linux.

  The InOrderPipelineModel plugin is a simplified 4 stage single issue CPU pipeline model. It has been tested to run on an FVP CortexA53x1 platform on Linux.

  The InOrderPipelineModel comes with the source code for the plugin and CPU model. The intention is to provide guidelines on how a user might create their own PipelineModel plugins for FastModels. The nmake for windows is not yet provided. See the Readme: $PVLIB_HOME/plugins/source/PipelineModel/Cores/InOrder/README

• GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) can work together to help graphics software stack verification in Fast Models 11.2. GRM implements ARM Mali graphics hardware without shader support and it can work with or without GGA. With GGA support, the end-user can view the rendering result in the Fast Models visulization window, and can use the error code checking feature to verify app correctness.

  Graphics APIs supported:

  • GLES
    • v2.0
    • v3.0
    • v3.1
  • Vulkan
    • 1.0.42

  New features in Fast Models 11.2:

  • Adds Vulkan GGA support.
  • Adds AFBC encoding support. Verified with bifrost-kernel r2p0-03rel0 and corresponding gralloc module.
  • Adds Mali-G51 (Beta). Verified with bifrost-kernel r7p0-01rel0 and corresponding gralloc module.

  Preferred host GPU hardware and driver:

  • If the target implements OpenGL ES APIs without Vulkan, the host can use any of the following graphics cards with drivers that support OpenGL 4.3 and above:
    • The preferred graphics card is NVIDIA GT 730 with driver versions:
      • 340.96 and above for Ubuntu
      • 340.66 and above for Windows
    • AMD graphics card R7 240 with driver versions:
      • 15.30 and above released by AMD officially, for Ubuntu.
      • 15.12 and above for Windows.
    • Intel HD graphics card HD Graphics 530 with driver versions:
      • Not available for Ubuntu.
      • 10.18.15.4279 for Windows.
  • To support Vulkan APIs, the preferred graphics card is NVIDIA GTX 1050 graphics card with driver versions:
    • 384.59 and above for Ubuntu.
    • 384.94 and above for Windows.

  Target GPU supported for GRM:

  • Mali-G71
  • Mali-G72. Verified with bifrost-kernel r2p0-03rel0 and corresponding gralloc module.
  • Mali-G51 (Beta). Verified with bifrost-kernel r7p0-01rel0 and corresponding gralloc module

  Integration guidance for GRM:

  • The source code for the SGM-775 System Guidance Mobile platform is provided as an example. This platform incorporates the Mali-G72 GRM, and illustrates how the model can be integrated into a platform. The sources can be found at FastModelsPortfolio_11.2/examples/LISA/CSS/Build_Kits3_SGM_775_Example

  • Firmware and scripts for booting this platform are not included in this distribution, but can be obtained directly from Arm by following the instructions at https://developer.arm.com/products/system-design/system-guidance/system-guidance-for-mobile. Note that the firmware distribution scripts support only Linux as a host platform.

  Target OSes supported:

  • Android 4.4.2
  • Android 6.0.1
  • Android 7.0.0

  Outstanding issues:

  • Some limitations for Vulkan support:
    • Only nVidia graphics driver is verified on host.
    • Only core specification is supported.
  • The following issues are for GLES only. They depend on the Mali OpenGL ES Emulator:
    • Doesn't support GLES v3.1 AEP and v3.2.
    • GLES extension API shadow2DEXT can't be correctly supported in GLES Shading Language.
    • GLES APIs glTexSubImage and glCopyTexSubImage2D have errors for some special formats like GL_ALPHA.
    • Android applications using GPU resources in multi-threaded manner are not well supported and might lead to unpredictable behavior.
  • Some corner cases may fail on AMD and Intel HD Graphics cards due to native graphics driver issues.
  • For Intel HD Graphics card, a driver version above 10.18.15.4279 may bring unexpected failures for some corner cases.

  Limitations:

  • For applications that only do single frame rendering, the rendering result is invisible in the Fast Models visualization window.
  • The MMU inside GPU can't be verified using GRM.

  Benchmark list verified:

  • Vulkan
    • Cube
    • Mali SDK Samples
    • Ice Cave for Vulkan
  • GLES
    • GLMark2
    • GFX Bench v2.7.5 and v3.0.11
    • AnTuTu 3D Rating
    • GPU Benchmark 3D v1.2.3
    • Unity Benchmark v1.1.1
    • Mali SDK Samples

• PVBusLogger added to the downstream port of Interconnect components except for CCI400.

• Support for Virtio Ethernet device model that conforms to the Virtio OASIS V1.0 specification. This device model provides much better network performance than the SMSC model, because it features host-assisted network acceleration. It is recommended to use this device on target simulated Linux or Linux-derived OS.

• Support for PPU v1.1 has been added to the main package.

• The SGM-775 source example platform implements the SGM-775 subsystem as specified by the Mobile System Guidance architecture specifications, with additional system peripherals to create a system model capable of booting Linux.

  For more information, refer to: https://developer.arm.com/products/system-design/system-guidance/system-guidance-for-mobile.

• The SGI-575 source example platform is available upon request (via support-esl@arm.com). This model implements the SGI-575 subsystem as specified by the Infrastructure System Guidance architecture specifications, with additional system peripherals to create a system model capable of booting Linux.

  For more information, refer to: https://developer.arm.com/products/system-design/system-guidance/system-guidance-for-infrastructure.

Notice

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• Model Shell and the related SimGen target (TARGET_MAXVIEW) are now deprecated. They will be removed from the Fast Models releases no earlier than May 2018.

• TarmacTraceV8 has been removed. TarmacTrace plugin has been enhanced to replace TarmacTraceV8.

• Excessive license checkouts may appear in client license diagnostics (FLEXLM_DIAGNOSTICS=3). However, the correct number of licenses are actually checked out.

• VFS has been removed. Please use Virtio P9.

• ARM926, ARM968, ARM1136 and ARM1176 models are now deprecated and should not be used. These will be removed in an upcoming release.

Fast Models limitations

• Cortex-A55 and Cortex-A75:

  • BROADCASTCACHEMAINTPOU pin is not implemented.
  • COREINSTRRET,COREINSTRRUN,nCLUSTERPMUIRQ,nPMBIRQ signals are not implemented.
  • 256-bit wide output transactions are not supported.
  • Dual ACE masters are not supported.
  • Error correction/detection features are not supported.
  • Self-test features (MBIST) are not supported.
  • Latency configuration is not supported.
  • Snoop filtering is not supported.
  • Cache stashing capability is not supported.

• DynamIQ(FCM). For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in 1st subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from Cortex-A55 subcluster, when viewed by CADI clients.

• DMC-620:

  • No support for address striping.
  • Works with linear addresses and not in rank,bank,row,column form.
  • Includes error injection and detection mechanisms and syndrome registers support only for 2 out of the 6 RAS error types.
  • Scrubbing functionality is not provided.
  • Does not implement direct read or write commands.
  • Does not implement any performance counters.

• CMN-600:

  • PMU counters are not supported (counter registers are implemented as RAZ).
  • All RNI and RND nodes control 3 interface ports. The other variants which control 2 or 1 ports are not supported.
  • QoS is not supported and all related registers are RAZ/WI.
  • Error injection and Error generation is not supported. All error registers are RAZ/WI.
  • Power/Clock/Interrupt signals are not supported.
  • HN-T nodes are not supported.

• SMMUv3AEM:

  • No support for RAS.
  • No support for power control. No P- or Q-channels.
  • AMBA 'stash' operations and 'destructive read' operations are not supported on PVBus and also not by the device.
  • The PMU has limited functionality, only a subset of the architecturally mandatory events are supported (as indicated by the SMMU_PMCG_CEID0 fields). The PMU is only intended for demonstration purposes and for driver development.
  • Cache maintenance operations from upstream client devices are not supported.

• Mali-V550:

  • No support for HEVC or RealVideo decoders.
  • No support for 10-bit video output.
  • No profiling support.
  • No QoS support.
  • Power/Test modes are modelled only as register state changes.
  • To build example platforms containing V550, either the Fast Models Third-Party IP package needs to be installed, or the dependency on FFmpeg and libvpx needs to be removed from the platform's sgproj file by removing the line containing "V5xx.sgrepo".

  The model requires an external OpenMAX (OMX) IL implementation for codec functionality. By default, V550 will look for ffomaxil.dll on Windows or libffomaxil.so on Linux in the model binary's directory or in the Fast Models installation. The default library path can be overridden using the parameter omx-library-path.

  FFomaxIL is an OMX IL implementation provided by ARM in the TPIP package for convenience. Please refer to the TPIP package for more details on FFomaxIL.

  When querying the OMX core, V550 will search for the following roles in the list of OpenMAX components:

  • H.264 decode: "video_decoder.avc"
  • JPEG decode: "video_decoder.mjpeg"
  • MPEG2 decode: "video_decoder.mpeg2"
  • MPEG4 decode: "video_decoder.mpeg4"
  • VC1 decode: "video_decoder.vc1"
  • VP8 decode: "video_decoder.vp8"
  • VP8 encode: "video_encoder.vp8"

• Mali-V61:

  • No support for HEVC, VP9 or RealVideo decoders.
  • No support for 10-bit video output.
  • No support for RGB or AFBC input for encoding.
  • No profiling support.
  • No QoS support.
  • Power/Test modes are modelled only as register state changes.
  • No support for AFBC 1.2.
  • Models r0p0 hardware revision.
  • To build example platforms containing V61, either the Fast Models Third-Party IP package needs to be installed, or the dependency on FFmpeg and libvpx needs to be removed from the platform's sgproj file by removing the line containing "V5xx.sgrepo".

  The model requires an external OpenMAX (OMX) IL implementation for codec functionality. By default, V61 will look for ffomaxil.dll on Windows or libffomaxil.so on Linux in the model binary's directory or in the Fast Models installation. The default library path can be overridden using the parameter omx-library-path.

  FFomaxIL is an OMX IL implementation provided by ARM in the TPIP package for convenience. Please refer to the TPIP package for more details on FFomaxIL.

  When querying the OMX core, V61 will search for the following roles in the list of OpenMAX components:

  • H.264 decode: "video_decoder.avc"
  • JPEG decode: "video_decoder.mjpeg"
  • MPEG2 decode: "video_decoder.mpeg2"
  • MPEG4 decode: "video_decoder.mpeg4"
  • VC1 decode: "video_decoder.vc1"
  • VP8 decode: "video_decoder.vp8"
  • VP8 encode: "video_encoder.vp8"

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.8.3 and GCC-4.8.4
• GCC-4.9.2
• GCC-5.4.0
• Visual Studio 2013 - Update 4
• Visual Studio 2015 - Update 3 (Support added in Fast Models 11.2)
• The following warning is produced when compiling Fast Models with Visual Studio 2015: Unknown compiler version - please run the configure tests and report the results. This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.2 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CTModel issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.2:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration
  Cache state modelling is on in my_platform.cci
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• CADIExecReset is no longer supported and CADIExecGetResetLevels does not throw an error.

• InOrderPipelineModel is tested on Linux only. nMakefile for Windows is not available yet.

• CortexA53PipelineModel plugin is available for Linux hosts only.

• DynamIQ does not support all cluster models.

• The Help output in SVP platforms lists "-f" command line shorthand being used for both "--config-file" and "--fast". Using "-f" will act as "--fast". In order to load a configuration file please use "--config-file" option instead.

• CMN600 YML parser faults with single quoted strings.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'doc' subfolder for Fast Models Tools and the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.1 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.1

• Support for breakpoints for vector catching has been added to the Fast Models of M-profile CPUs

• Partial ITM support. Support for a subset of the architectural debug feature, Instrumentation Trace Macrocell (ITM), has been added to the Fast Models of M-profile CPUs that support it. ITM behavior is strongly dependent on microarchitecture, so many parts of the feature are not implemented in Fast Models. For details of the level of support of ITM, see the section of the Fast Models Reference Manual relating to each CPU component.

• architecture-version parameter removed from AEMv8M core. The parameter accepted one value, '8', meaning 'v8-M', which is the only architecture supported by the AEMv8M model.

• Enhancement to the MMU_TRANS MTI trace source on core components. The MMU_TRANS trace source has two new fields STAGE1_PERM and STAGE2_PERM. The new fields indicate the permission checks that will be applied to accesses in the page. The format of the new fields can be found using the ListTraceSources plugin.

• GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) can work together to help graphics software stack verification in Fast Models 11.1. GRM implements ARM Mali graphics hardware without shader support and it can work with or without GGA. With GGA support, the end-user can view the rendering result in the Fast Models visualization window, and can use the error code checking feature to verify app correctness.

  Graphics APIs supported:

  • GLES
    • v2.0
    • v3.0
    • v3.1
  • Vulkan
    • 1.0.42

  New features in Fast Models 11.1:

  • Adds Vulkan support (Beta)
  • Adds gpu_reset signal port support for GRM
  • Adds prot_mode_m0 signal port for protected mode content access control for GRM.
  • 2x Mali Cube FPS improvement for GGA

  Preferred host GPU hardware and driver:

  • The preferred graphics card model is nVidia GT730 and the corresponding driver versions are:
    • GLES:
      • Ubuntu : 367.57 and above
      • Windows : 368.39 and above
    • Vulkan:
      • Ubuntu : 384.47 and above
  • Graphics cards supported for other vendors cover:
    • AMD. The typical model is R7 240 and the driver versions are:
      • Ubuntu : 15.30 and above released by AMD officially
      • Windows : 15.12 and above
    • Intel HD Graphics. The typical model is HD Graphics 530 and driver versions are:
      • Ubuntu : Not supported due to unqualified native driver
      • Windows : 10.18.15.4279

  Target GPU supported for GRM:

  • Mali-G71
    • GPU Kernel Device Drivers can be found at https://developer.arm.com/products/software/mali-drivers/bifrost-kernel
    • This is tested with bifrost-kernel r2p0-03rel0
  • Mali-G72 (Beta)
    • This is tested with bifrost-kernel r2p0-03rel0

  Target OSes supported:

  • Android 4.4.2
  • Android 6.0.1
  • Android 7.0.0

  Outstanding issues:

  • Some limitations for Vulkan support
    • Can only support 64-bit target, and 32-bit target can't be supported yet.
    • Can only support linux host, and windows host can't be supported yet.
    • Only nVidia graphics driver is verified on host.
    • Only core specification is supported.
  • The following issues are for GLES only. They depend on the Mali OpenGL ES Emulator:
    • Doesn't support GLES v3.1 AEP and v3.2.
    • GLES extension API shadow2DEXT can't be correctly supported in GLES Shading Language.
    • GLES APIs glTexSubImage and glCopyTexSubImage2D have errors for some special formats like GL_ALPHA.
    • Android applications using GPU resources in multi-threaded manner are not well supported and might lead to unpredictable behavior.
  • Some corner cases may fail on AMD and Intel HD Graphics cards due to native graphics driver issues.
  • For Intel HD Graphics card, a driver version above 10.18.15.4279 may bring unexpected failures for some corner cases.

  Limitations:

  • For applications that only do single frame rendering, the rendering result is invisible in Fast Model visualization window.
  • The MMU inside GPU can't be verified using GRM.

  Benchmark list verified:

  • Vulkan
    • Cube
    • Mali SDK Samples
  • GLES
    • GLMark2
    • GFX Bench v2.7.5 and v3.0.11
    • AnTuTu 3D Rating
    • GPU Benchmark 3D v1.2.3
    • Unity Benchmark v1.1.1
    • Mali SDK Samples

  To make Vulkan (Beta) feature work, create symbolic link /vendor/lib64/hw/vulkan.<ro.board.platform>.so. For example:

  adb remount
  adb shell sudo ln -s /vendor/lib64/egl/libGLES_vimpl.so /vendor/lib64/hw/vulkan.fvp.so

• ScalableVectorExtension plug-in has been added. It enables AEMv8-A processor models to execute SVE instructions.

• RealTimeLimiter default setting has changed from true to false.

• DynamIQ(FCM) is a new type of platform introduced in 11.0 that includes one cluster of Cortex-A55 and Cortex-A75 combined to form an FVP_Base. These platforms include the flexible Cortex-A55+Cortex-A75 FVP_Base DynamIQ which provides the subclusterX.NUM_CORES parameters to configure the number of Cortex-A55 and Cortex-A75 instances within the cluster at runtime. Each subcluster within the DynamIQ cluster can be configured independently by using the parameters exposed with the subclusterX.param_name prefix where X=0 or 1.

  Partial powerdown of L3 Cache is implemented. Two new related parameters have been added to FCM model: diagnostics and default_opmode.

  More information can be found here: https://developer.arm.com/docs/100453/0002

• As a result of switching to the SystemC scheduler and deprecating the Fast Models internal scheduler, the following effects can be observed:

  • Simulations aren't reproducible in terms of scheduling of threads and events between versions after 11.0 and previous releases.
  • CADI reset is not supported any more and returns eslapi::CADI_STATUS_CmdNotSupported.
  • Default quantum is now 10000 and can be set on the comamnd line through -Q.
  • min sync latency can also be set at the command line through -M. Default is 100.

Advanced Notice

• Fast Models will deprecate TarmacTraceV8, resulting in a single TarmacTrace plugin.
• The folder structure in FastModelsPortfolio will be refactored in a future release.
• Fast Models will deprecate VS2013 in the November'17 release.

Notice

• Excessive license checkouts may appear in client license diagnostics (FLEXLM_DIAGNOSTICS=3). However, the correct number of licenses are actually checked out.
• VFS has been removed. Please use Virtio P9.
• ARM926, ARM968, ARM1136 and ARM1176 models are now deprecated and should not be used. These will be removed in an upcoming release.

Compilers and Operating Systems supported by Fast Models

• RedHat 6
• RedHat 7
• Ubuntu 14.04
• Ubuntu 16.04
• Windows 7
• Windows 10
• GCC-4.8.3 and GCC-4.8.4
• GCC-4.9.2
• GCC-5.4.0
• Visual Studio 2013 - Update 4
• Visual Studio 2015 - Update 3 (Support added in Fast Models 11.1)
• The following warning is produced when compiling Fast Models with Visual Studio 2015:

  Unknown compiler version - please run the configure tests and report the results

  This occurs due to the Accellera SystemC library using an older version of the Boost library which is not aware of any versions after Visual Studio 2013.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.1 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CTModel issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• CADI methods deprecated for use in Fast Models 11.1:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration
  Cache state modelling is on in my_platform.cci
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Elf object loader ignores SHT_REL/SHT_RELA sections.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• AEMv8M model missing array of NS stcalib ports. These models are present in other Cortex-M models.

• force_on_from_start on CMN600 does not work correctly which means coherent transactions are not allowed through the CMN600.

• The read-only register ICDABR on the Corex-R8 is incorrectly modelled as read/write.

• PPU v1.1 exposes signals in CADI that are not functional in the model, including smpen, standbtwfi and ppuhwstat.

• CADIExecReset is no longer supported and CADIExecGetResetLevels does not throw an error.

• MTI source ASYNC_MEMORY_FAULT FAULT field for R4/R5 is not always in ESR format which makes it difficult to interpret.

• When using the AEMv8A-AEMv8A the parameter internal_vgic should always be false.

• DynamIQ does not support all cluster models.

• The Help output in SVP platforms lists "-f" command line shorthand being used for both "--config-file" and "--fast". Using "-f" will act as "--fast". In order to load a configuration file please use "--config-file" option instead.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

• When both TARGET_MAXVIEW and TARGET_SYSTEMC_ISIM are enabled only the isim_simulator gets generated by SimGen, not the CADI library.

• On Windows, .bmp files are copied into the top Build folder for FVP_MPS2 models. They are not accessible to the isim_system generated in the internal platform/flavor dependent folder. An easy workaround is to manually copy them into that folder.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.

Detailed documentation can be found in the 'doc' subfolder for Fast Models Tools and the 'Docs' subfolder for Fast Models Portfolio.

A significant number of the examples in Fast Models Portfolio 11.0 make use of images containing third party IP. These have been split out into a separate 'Third Party IP' package that can be downloaded from:

• http://connect.arm.com
• http://silver.arm.com

Not installing these images will mean that examples that require Dhrystone or the Linux images will not be functional, as well as examples using Accellera SystemC 2.3.1.

Enhancements and Changes in Fast Models Portfolio 11.0

• Deprecation of Fast Models internal scheduler in favour of SystemC. The legacy Fast Models scheduler is deprecated in 11.0 release. All of the ISIM executables produced by simgen are based on SystemC. Thus, TARGET_ISIM of sgproj files is dropped.

  The following new targets are introduced in Fast Models 11.0:

  • TARGET_ISIM_DEPRECATED will continue to behave as the current TARGET_ISIM until the feature is finally dropped in May 2018.

  • TARGET_SYSTEMC_ISIM is the new target which produces SystemC ISIM executables.

  • TARGET_SYSTEMC_AUTO produces a single EVS component by applying the new auto-bridging mechanism to LISA components. This feature will eventually replace completely the current TARGET_SYSTEMC.

  As a result of the change of scheduler the following effects could be observed:

  • Simulations are not reproducible in terms of scheduling of threads and events between 11.0 and previous releases.

  • CADI reset is not supported any more and returns eslapi::CADI_STATUS_CmdNotSupported.

  • Default quantum is now 10000 and could be set on the command line through -Q.

  • Min sync latency could also be set at the command line through -M. Default is 100.

• This package adds support for the Cortex-A55 CTModel with the following LISA definitions:

  • CortexA55x1

  • CortexA55x2

  • CortexA55x3

  • CortexA55x4

  • CortexA55x8

  This package supports the following example FVP_Base platforms:

  • FVP_Base_Cortex-A55x1

  • FVP_Base_Cortex-A55x2

  • FVP_Base_Cortex-A55x4

  • FVP_Base_Cortex-A55 (with NUM_CORES configurable)

  The following features are supported by the model:

  • DynamIQ(FCM) system registers are implemented.

  • Per-Core L2Cache is supported.

  • PChannel for cluster and each core is implemented.

  • Optional peripheral port is supported.

  • L3Cache partition is supported.

  • Per-core clock is implemented.

  The following features are not supported by the model:

  • BROADCASTCACHEMAINTPOU pin is not implemented.

  • COREINSTRRET,COREINSTRRUN,nCLUSTERPMUIRQ,nPMBIRQ signals are not implemented.

  • 256-bit wide output transactions are not supported.

  • Dual ACE masters are not supported.

  • Error correction/detection features are not supported.

  • Self-test features (MBIST) are not supported.

  • Latency configuration is not supported.

  • Snoop filtering is not supported.

  • Cache stashing capability is not supported.

• This package adds support for the Cortex-A75 CTModel with the following LISA definitions:

  • CortexA75x1

  • CortexA75x2

  • CortexA75x3

  • CortexA75x4

  The package supports the following example FVP_Base platforms:

  • FVP_Base_Cortex-A75x1

  • FVP_Base_Cortex-A75x2

  • FVP_Base_Cortex-A75x4

  • FVP_Base_Cortex-A75 (with NUM_CORES configureable)

  The following features are supported by the model:

  • DynamIQ(FCM) system registers are implemented.

  • Per-Core L2Cache is supported.

  • PChannel for cluster and each core is implemented.

  • Optional peripheral port is supported.

  • L3Cache partition is supported.

  • Per-core clock is implemented.

  The following features are not supported by the model:

  • BROADCASTCACHEMAINTPOU pin is not implemented.

  • COREINSTRRET,COREINSTRRUN,nCLUSTERPMUIRQ,nPMBIRQ signals are not implemented.

  • 256-bit wide output transactions are not supported.

  • Dual ACE masters are not supported.

  • Error correction/detection features are not supported.

  • Self-test features (MBIST) are not supported.

  • Latency configuration is not supported.

  • Snoop filtering is not supported.

  • Cache stashing capability is not supported.

• DynamIQ(FCM) FVP_Base Platforms are added in 11.0 release.

  This release adds the DynamIQ(FCM) cluster of Cortex-A55 and Cortex-A75 put together to form a FVP_Base platform. New fixed-configuration FVP_Base DynamIQ platforms including Cortex-A55x1+Cortex-A75x1, Cortex-A55x2+Cortex-A75x2, Cortex-A55x2+Cortex-A75x4, and Cortex-A55x4+Cortex-A75x4 are added.

  A new flexible Cortex-A55+Cortex-A75 FVP_Base DynamIQ platform is also added in this release. The flexible Cortex-A55+Cortex-A75 platform provides the configurability to use the subclusterX.NUM_CORES parameters to configure at runtime the number of Cortex-A55 and Cortex-A75 instances within the cluster. Each subcluster within the DynamIQ cluster can be configured independently by using the parameters exposed with the subclusterX.param_name prefix, where X=0 or 1.

  The following features are supported by DynamIQ(FCM) clusters:

  • DynamIQ(FCM) cluster system registers are implemented.

  • Timing annotation for L3 cache is implemented.

  • Partitioning of L3 cache is implemented.

  • L2cache parameters are changed to be per-core basis instead of cluster basis in this release.

  • For Cortex-A55+Cortex-A75 FVP_Base platform, the subcluster level NUM_CORES parameter is supported to instantiate flexible combinations of Cortex-A55 and Cortex-A75 core instances within the cluster.

  Limitations of the DynamIQ(FCM) clusters:

  • Partial powerdown of L3 Cache is not implemented yet.

  • For flexible Cortex-A55+Cortex-A75 clusters, there is a known issue related to presentation of parameters and CADI targetNames to CADI clients when cpu instances in 1st subcluster are configured to be less than 4. CADI targetNames and parameters for cpu[0-3] are always shown from Cortex-A55 subcluster, when viewed by CADI clients.

• This package contains the following updates to Cortex-R52:

  • A new parameter num_protection_regions_s1 is provided to configure number of stage1 MPU regions.

  • ID values in registers have changed according to revision r1p0.

  • EDECCR register is updated as per revision r1p0.

• IDAU parameter changes in the 11.0 release:

  The IDAU has been moved from v8-M cores, and duplicates in other components, into a dedicated component. As a result, the names of parameters in FVPs have changed to refer to this component instead of the CPUs and other devices. See comments at the top of IDAU.lisa and the MPS2 example for information on how to use the IDAU component.

• CMN-600:

  The CMN-600 model supports the following:

  • rnf, rni/rnd , hni, snf/sbsx interface ports. The mapping between port number and NodeId is based on the NodeId index. For example, RNF2 (index is specified in node_info register as logical_id) controls pvbus_s_rnf[2]. Similar behavior can be expected for HNI.

    If both RND and RNI nodes are present then all starting rni ports are mapped to RND nodes and then the RNI nodes. For example, for CMN-600 with 2 RND nodes, 1 RNI node and given each RNI/RND node controls 3 interface ports, pvbus_s_rni[0-2] maps to RND0, pvbus_s_rni[3-5] maps to RND1 and pvbus_s_rni[6-8] maps to RNI0. Similarly, SNF and SBSX nodes are mapped to pvbus_m_snf[] ports where starting ports are mapped to SNF and then SBSX nodes.

  • A parameter to define the mesh placement of the CHI nodes. The parameter mesh_config_file can be used in the following ways:

    • Set it to the name of the yml configuration file emitted by Socrates.

    • Set it to a json file with the following format (file extension should be .json):

      {
          "mesh_row_size":4,
          "mesh_column_size":3,
          "mesh_placement" : {
          "0.0" : "RND:HND",  "1.0" : "RND:RNF",  "2.0" : "RND:RNF",
          "0.1" : "HNF:HNF",  "1.1" : "HNF:HNF",  "2.1" : "HNF:HNF",
          "0.2" : "HNF:HNF",  "1.2" : "HNF:HNF",  "2.2" : "HNF:HNF",
          "0.3" : "RND:HNF",  "1.3" : "HNF:HNF",  "2.3" : "HNF:SNF"
      }

  • The Discovery feature to determine system address of CHI Nodes.

  • Hashed and non-hashed memory regions as well as sys_cache_group for hashed memory regions.

  • DVM filtering using VMF registers.

  • Entry/exit of RNs from snoop and DVM domain using both SYSCOREQ/SYSCOACK signals and via software using MXP syscoreq registers.

  • Reading the content of cache via HNF l3_cache_access* registers provided cache_state_modelled is true.

  • HNF SAM feature to allocate a range of addresses to a specific SNF.

  • HNF Cache way lock and OCM.

  Limitations:

  • PMU counters are not supported (counter registers are implemented as RAZ).

  • All RNI and RND nodes control 3 interface ports. The other variants which control 2 or 1 ports are not supported.

  • QoS is not supported and all related registers are RAZ/WI.

  • Error injection and Error generation is not supported. All error registers are RAZ/WI.

  • Power/Clock/Interrupt signals are not supported.

  • RN SAM and HN-F SAM memory partition size of 128MB is not supported.

  Outstanding issues:

  • The power related registers in HNF are implemented but may not have the required functional behavior.

  Changes:

  • Fast Models 11.0 fixes the num_hnf field size from 5 to 6 bits in sys_cache_group_hn_count register to match spec.

• GIC-600

  Fast Models 11.0 introduces an ARM GIC-600 Generic Interrupt Controller model suited for single chip systems.

  This model provides a simple configuration interface that allows designers to introduce GIC-600 like functionality to their systems, while only implementing the architectural behaviors as defined by the GICv3 architecture.

  All implementation-specific registers and functionality are unimplemented except for GICR_PWRR for which an effectless but stateful implementation is present. This allows the correct value to be observed by a power-aware software implementation.

  As with the other GIC componenents, there are two variants of the component with slightly different memory interfaces. Both the GIC600 and the GIC600_Filter have a pvbus_s port for register access and a pvbus_m port for the LPI related traffic from redistributors and the ITS.

  In addition, the GIC600_Filter variant has a pvbus_filtermiss_m port, to which any transaction coming on the pvbus_s port and not directed to a 4k page used by the GIC is forwarded unmodified. Such transactions are terminated in the component when using the GIC600 variant. It is recommended to use the GIC600 variant in most cases.

• SMMUv3AEM

  This is an architectural model implementing the SMMUv3.0 and SMMUv3.1 architectures which are for I/O virtualization of devices.

  Limitations:

  • RAS

  • No P- or Q-channels for power control.

  • AMBA 'stash' operations and 'destructive read' operations are not supported on PVBus and also not by the device.

  • The PMU has limited functionality, only a subset of the architecturally mandatory events are supported (as indicated by the SMMU_PMCG_CEID0 fields). The PMU is only intended for demonstration purposes and for driver development.

  • Cache maintenance operations from upstream client devices are not supported.

• Mali-V550

  Model parameters have been changed to better reflect RTL configurability. They have been grouped into fuse-disable-* and supports-* to distinguish between fuse input ports and RTL configuration.

  New parameters:

  • fuse-disable-VP8

  Changed parameters:

  • supports-AFBC renamed to fuse-disable-AFBC; no longer affects CONFIG register

  • supports-Real renamed to fuse-disable-Real; no longer affects CONFIG register

  • supports-VP8 no longer affects FUSE register (use fuse-disable-VP8 for that)

  Changed parameter defaults:

  • AXI-data-width: default changed from 3 (64 bits) to 4 (128 bits). The original value is only supported for "ncores" parameter values of 1 and 2. The new value is supported for all supported "ncores" values.

  Removed parameters:

  • ID-bits: can be computed directly from the value of "ncores"

  New features in this release:

  • Preview support for VP8 encode. Can accept three-plane progressive-scan YUV420p input frames and an FPS setting.

  The following limitations are present in this release:

  • No support for HEVC & RealVideo decoders

  • No support for 10-bit video output

  • No profiling support

  • No QoS support

  • Power/Test modes are modelled only as register state changes

  Known issues:

  • To build example platforms containing V550, either the Fast Models Third-Party IP package needs to be installed, or the dependency on FFmpeg and libvpx needs to be removed from the platform's sgproj file by removing the line containing "V5xx.sgrepo".

  The model requires an external OpenMAX (OMX) IL implementation for codec functionality. By default, V550 looks for ffomaxil.dll on Windows or libffomaxil.so on Linux in the model binary's directory or in the Fast Models installation. The default library path can be overridden using the parameter omx-library-path.

  FFomaxIL is an OMX IL implementation provided by ARM in the TPIP package for convenience. Refer to the TPIP package for more details on FFomaxIL.

  When querying the OMX core, V550 searches for the following roles in the list of OpenMAX components:

  • H.264 decode: "video_decoder.avc"
  • JPEG decode: "video_decoder.mjpeg"
  • MPEG2 decode: "video_decoder.mpeg2"
  • MPEG4 decode: "video_decoder.mpeg4"
  • VC1 decode: "video_decoder.vc1"
  • VP8 decode: "video_decoder.vp8"
  • VP8 encode: "video_encoder.vp8"

• Mali-V61

  Model parameters have been changed to better reflect RTL configurability. They have been grouped into fuse-disable-* and supports-* to distinguish between fuse input ports and RTL configuration.

  Changed parameters:

  • supports-AFBC renamed to fuse-disable-AFBC; no longer affects CONFIG register

  • supports-Real renamed to fuse-disable-Real; no longer affects CONFIG register

  • supports-VPX renamed to fuse-disable-VPX; no longer affects CONFIG register

  Changed parameter defaults:

  • AXI-data-width: default changed from 3 (64 bits) to 4 (128 bits). The original value is only supported for "ncores" parameter values of 1 and 2. The new value is supported for all supported "ncores" values.

  Removed parameters:

  • ID-bits.

  New features in this release:

  • Preview support for VP8 encode. Can accept three-plane progressive-scan YUV420p input frames and an FPS setting.

  The following limitations are present in this release:

  • No support for HEVC, VP9, or RealVideo decoders

  • No support for 10-bit video output

  • No support for RGB or AFBC input for encoding

  • No profiling support

  • No QoS support

  • Power/Test modes are modelled only as register state changes

  • No support for AFBC 1.2

  • Models r0p0 hardware revision

  Known issues:

  • To build example platforms containing V61, either the Fast Models Third-Party IP package needs to be installed, or the dependency on FFmpeg and libvpx needs to be removed from the platform's sgproj file by removing the line containing "V5xx.sgrepo".

  The model requires an external OpenMAX (OMX) IL implementation for codec functionality. By default, V61 will look for ffomaxil.dll on Windows or libffomaxil.so on Linux in the model binary's directory or in the Fast Models installation. The default library path can be overridden using the parameter omx-library-path.

  FFomaxIL is an OMX IL implementation provided by ARM in the TPIP package for convenience. Please refer to the TPIP package for more details on FFomaxIL.

  When querying the OMX core, V61 will search for the following roles in the list of OpenMAX components:

  • H.264 decode: "video_decoder.avc"
  • JPEG decode: "video_decoder.mjpeg"
  • MPEG2 decode: "video_decoder.mpeg2"
  • MPEG4 decode: "video_decoder.mpeg4"
  • VC1 decode: "video_decoder.vc1"
  • VP8 decode: "video_decoder.vp8"
  • VP8 encode: "video_encoder.vp8"

• GGA and GRM

  GGA (Generic Graphics Accelerator) and GRM (Graphics Register Model) can work together to help graphics software stack verification in Fast Model 11.0. The GRM implements ARM Mali graphics hardware without shader support and it can work with or without GGA. With GGA support, the end-user can view the rendering result in the Fast Models visulization window, and can use the error code checking feature to verify app correctness.

  Open GLES APIs supported:

  • v2.0
  • v3.0
  • v3.1

  New features in Fast Models 11.0:

  • Support for error code checking to compare error codes between host and target.

  • Support for GPU trace dumping to expose all register access details inside graphics processor.

  Preferred host GPU hardware and driver:

  • The preferred graphics card model is nVidia GT730 and the corresponding driver versions are:

    • Ubuntu: 367.57 and above

    • Windows: 368.39 and above

  • Graphics cards supported for other vendors cover:

    • AMD. The typical model is R7 240 and the driver versions are:

      • Ubuntu: 15.30 and above released by AMD officially

      • Windows: 15.12 and above

    • Intel HD Graphics. The typical model is HD Graphics 530 and driver versions are:

      • Ubuntu : Not supported due to unqualified native driver

      • Windows : 10.18.15.4279

  Target GPU supported by GRM:

  • Mali-G71

  Target OSes supported:

  • Android 4.4.2
  • Android 6.0.1
  • Android 7.0.0

  Outstanding issues:

  • The following issues depend on Mali OpenGL ES Emulator:

    • Doesn't support GLES v3.1 AEP and v3.2.

    • OpenGL ES extension API shadow2DEXT can't be correctly supported in GLES Shading Language.

    • OpenGL ES APIs glTexSubImage and glCopyTexSubImage2D have errors for some special formats like GL_ALPHA.

    • Android applications using GPU resources in multi-threaded manner are not well supported and might lead to unpredictable behavior.

  • Some corner cases may fail on AMD and Intel HD Graphics cards due to native graphics driver issues.

  • For Intel HD Graphics card, a driver version above 10.18.15.4279 may bring unexpected failures for some corner cases.

  Limitations:

  • For applications that only do single frame rendering, the rendering result is invisible in Fast Model visualization window.

  • The MMU inside GPU can't be verified using GRM.

  Benchmark list verified:

  • GLMark2
  • GFX Bench v2.7.5 and v3.0.11
  • AnTuTu 3D Rating
  • GPU Benchmark 3D v1.2.3
  • Unity Benchmark v1.1.1
  • Mali SDK Samples

• Platform examples

  FVP_Base_AEMv8A-AEMv8A-CMN600 is introduced in Fast Models 11.0.

  Rate-limiter has been turned to OFF by default on FVP platforms. Linux running on platform FVP_Base_AEMv8A-AEMv8A has been observed to become unresponsive after several hours. A work-around is to turn rate-limiter to ON (-C bp.vis.rate_limit-enable=1 )

• Usage notes for the P-Channel power management protocol:

  • Master interface: void pactive (uint32_t power_state)
  • Slave interface: prespt_t prequest (uint32_t)
  • enum presp_t { ACCEPT, DENY }

  ARMv8A cores support the following enumeration for power_state:

  enum { OFF = 0, OFF_EMU, MEM_RET, MEM_RET_EMU, LOGIC_RET, FULL_RET, MEM_OFF, FUNC_RET,
      ON, WARM_RST, DBVG_RECOV }

  Components using P-Channel:

  • A Power-Controller implements void pactive (uint32_t power_state). power_state is kept as uint32_t because it is up to the "System" using P-Channels to decide the enumeration of power states it wants to support. A device calls this API to give a hint to the Power-Controller that it can go to a particular power state. A Power-Controller can take action based on its design. It will usually communicate to the device by calling device.prequest(new_power_state).

  • A device such as a CPU implements prespt_t prequest (uint32_t power_state). A Power-Controller would typically call prequest(new_power_state) on the device and look for a response, which can either be ACCEPT or DENY. A device implements this API and provides an appropriate response based on its logic.

  Usage changes between the old way of using stdbywfi/stdbywfe and P-Channels

  • Previously:

    • CPU: Drive stdbywfi = HIGH
    • Power-Controller: Perform some logic X

  • Now:

    • CPU: Call pactive(OFF)
    • Power-Controller: Call prequest(OFF) if it indeed wants CPU to go to OFF and then perform logic X

    When the controller wants to wake-up the CPU, it should send prequest(ON)

  For access to the following additional documentation, contact ARM:

  • ARM® Power Control System Architecture Specification, Version 1.0 (ARM DEN 0050)
  • ARM® Power Control System Architecture Supplement for ARM® Cortex™-A v8.2 Profile Processors (ARM DEN 0059)
  • AMBA® Low Power Interface Specification, ARM® Q-Channel and P-Channel Interfaces (ARM IHI 0068C ID091216)

• AEMv8A core personalities

  The AEM core personalities feature allows you to configure AEM instances in a platform to use the IMPLEMENTATION DEFINED registers and UNPREDICTABLE behavior for a specific implementation of your choice at model startup.

  Configuring an AEM with a core personality requires a license for both the AEM and the selected implementation.

  Setting the personality can be done using either an environment variable or a parameter. The parameter allows you to configure different instances in the same platform with different personalities, including subclusters in a heterogeneous AEM. The environment variable takes precedence over the parameter and will affect all instances of the AEM in the platform. Other than this, the two function identically:

  • Environment variable FASTSIM_AEMV8_PROFILE.
  • Cluster or subcluster-level parameter impdef_regs_and_unpred_from_implementation.

  To see the available values for the environment variable or parameter, set either of them to the special value list. The model will print the list of available values and exit. An example value is: ARM_Cortex-A57. Then set the parameter or environment variable to the required value.

  Configuring a core personality only affects IMPLEMENTATION DEFINED registers and UNPREDICTABLE behaviour. In other respects, the cluster or subcluster will still behave like the AEM. For example, all parameters will default to the AEM default values. Therefore, parameters have to be manually configured to valid values for the configured personality, as many of the defaults will be incompatible with any given implementation.

  To assist with this, the AEM will print warnings for any parameter with an invalid value for the configured personality, listing the parameter name and the valid value or range of values it should be set to for the selected personality.

  Running the model with invalid parameter configurations for the selected personality may lead to unexpected behaviour.

• Plugins:

  • TarmacTraceAEM has been removed.

  • Fastline has been introduced in Fast Models 11.0.

  • 'use_instr_cnt_as_timestamp', a new command line parameter has been added to TarmacTrace and TarmacTraceV8. When use_instr_cnt_as_timestamp is set to 1, it uses the instruction count instead of the simulation time as the timestamp in the trace. The default value is 0.

• Support for Linux compiler GCC-4.7 has been removed from Fast Models 11.0.

Advanced Notice

• Fast Models will deprecate TarmacTraceV8, resulting in a single TarmacTrace plugin.

• The folder structure in FastModelsPortfolio will be refactored in a future release.

• VFS will be removed in a future release. ARM recommends using Virtio P9 instead.

Notice

• The BaseR platform swaps the upper 2GB address space with the lower 2GB in its memory map with respect to Base platform. This means that any peripherals in the memory range [0x0 - 0x7FFFFFFF] (in Base) will be available at the same offset in the memory range [0x80000000 - 0xFFFFFFFF] (in BaseR), and vice-versa.

  The DRAM in the Base platform memory map starts at address 0x80000000, which in BaseR would prevent any code from running from DRAM after reset since in the V8R architecture, the upper 2GB of memory (i.e. [0x80000000 - 0xFFFFFFFF]) do not have execution permissions by default (i.e. after reset).

• C++11 was enabled in 10.1 and is in use from 10.2. For full compatibility, it is highly recommended that all code that links against the Fast Models should also be compiled with C++11 support enabled. While there are no known issues when linking non-C++11 code with the Fast Models, the compiler does not guarantee that the ABI is the same for both types of code, and compiling models with C++11 support disabled may cause data corruption or other issues when using them.

• AMBAPV has been amended to bridge the ExtendedID and TranslatedAccess attributes of PVBus transactions

• Fast Models 10.2 introduced API version checking for SystemC components. If you are using SystemC eXported components, you will need to ensure those components have been exported from the same version of Fast Models. Different versions in the same executable or library are not supported.

• Format of traces generated by TarmacTrace has been modified to match the format generated by TarmacTraceV8.

• Excessive license checkouts may appear in client license diagnostics (FLEXLM_DIAGNOSTICS=3). However, the correct number of licenses are actually checked out.

FLEXnet license management utilities

FLEXnet server binaries are no longer shipped with the product; if you need them, download them from https://developer.arm.com/products/software-development-tools/license-management/downloads.

Release 11.0 of Fast Models requires a newer version of the FLEXnet license management utilities. If you are using floating licenses, you need to upgrade to version 11.14.1.0 (or later) of the FLEXnet license management utilities. Prior versions are not compatible.

License queueing support

When using floating licenses, if all available licenses are in use, models and tools can be configured to queue until a license is available. This is enabled by setting the environment variable FM_LICENSE_QUEUE_TIMEOUT to a timeout value in seconds. The default value of 0 disables this feature.

Note that enabling this feature may cause model initialisation to take a long time, as models will wait for a license to become available until the timeout period expires, rather than failing immediately.

Linaro images and command lines tested in this release

All A-profile platforms available in this release have been validated against the following Linaro images: Android 16.12 for v8-A platforms and Android 15.03 for v7-A platforms.

The command lines tested are:

• v8-A:

  FVP_Base_AEMv8A-AEMv8A \
  -C pctl.startup=0.0.0.0 -C bp.secure_memory=0 -C cache_state_modelled=0 -C bp.pl011_uart0.untimed_fifos=1 \
  -C bp.secureflashloader.fname=bl1.bin -C bp.flashloader0.fname=fip.bin \
  -C bp.ve_sysregs.mmbSiteDefault=0 -C bp.virtioblockdevice.image_path=fvp.img \
  --data cluster0.cpu0=Image@0x80080000 \
  --data cluster0.cpu0=fdt.dtb@0x82000000 \
  --data cluster0.cpu0=ramdisk.img@0x84000000

  EVS_Base_AEMv8A-AEMv8A.x \
  -C Base.pctl.startup=0.0.0.0 -C Base.bp.secure_memory=0 -C Base.cache_state_modelled=0 -C Base.bp.pl011_uart0.untimed_fifos=1 \
  -C Base.bp.secureflashloader.fname=bl1.bin -C Base.bp.flashloader0.fname=fip.bin \
  -C Base.bp.ve_sysregs.mmbSiteDefault=0 -C Base.bp.virtioblockdevice.image_path=fvp.img \
  --data Image@0x80080000 \
  --data fdt.dtb@0x82000000 \
  --data ramdisk.img@0x84000000

  (This command line is also valid for SVPs)

• v7-A:

  FVP_VE_Cortex-A15x1-A7x1 \
  -C motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C motherboard.flashloader1.fname=uefi-vars.fd \
  -C motherboard.flashloader1.fnameWrite=uefi-vars.fd -C motherboard.mmc.p_mmc_file=linaro.img \
  -C motherboard.pl011_uart0.unbuffered_output=true -C motherboard.smsc_91c111.enabled=1 \
  -C motherboard.hostbridge.userNetworking=1

  EVS_LinuxBoot_Cortex-A15x2 \
  -C Base.motherboard.flashloader0.fname=boot/rtsm/uefi_rtsm_ve-ca15.bin -C Base.motherboard.flashloader1.fname=uefi-vars.fd \
  -C Base.motherboard.flashloader1.fnameWrite=uefi-vars.fd -C Base.motherboard.mmc.p_mmc_file=linaro.img \
  -C Base.motherboard.pl011_uart0.unbuffered_output=true -C Base.motherboard.smsc_91c111.enabled=1 \
  -C Base.motherboard.hostbridge.userNetworking=1

  (This command line is also valid for SVPs)

Outstanding CT model issues

• Models only support some types of memory breakpoints. Currently the error message returned if an unsupported type is used may not clearly indicate that the breakpoint type is unsupported.

• The following CADI methods are not supported by Fast Models:

  • CADI:
    • Parameter API
      • CADIGetParameters()
      • CADIGetParameterInfo()
      • CADIGetParameterValues()
      • CADISetParameters()
    • Register API
      • CADIGetCommitedPCs()
    • Memory API
      • CADIMemGetOverlays()
    • Virtual Memory API
      • PhysicalToVirtual()
    • Cache API
      • CADIGetCacheInfo()
      • CADICacheRead()
      • CADICacheWrite()
    • Execution API
      • CADIExecLoadApplication()
      • CADIExecUnloadApplication()
      • CADIExecGetLoadedApplications()
      • CADIExecAssertException()
      • CADIExecGetPipeStages()
      • CADIExecGetPipeStageFields()
      • CADIGetCycleCount()
  • CADIDisassembler:
    • GetSourceReferenceForAddress()
    • GetAddressForSourceReference()
    • GetInstructionType()
  • CADIDisassemblerCB:
    • ReceiveSourceReference()

• CADI methods deprecated for use in Fast Models 11.0:

  • CADICallbackObj
    • appliOpen()
    • appliClose()
    • cycleTick()
    • killInterface()

• When attempting to debug an ISIM system, if you launch Model Debugger from System Canvas and then specify an application to load this causes an error in Model Debugger (Error using application...), and the model and application fail to load.

  Workaround: Launch Model Debugger without specifying an application, and then load the application from within Model Debugger itself using File -> Load Application Code.

• A15 bus transactions are not bus accurate.

• CADI and MTI names for CP15 registers are different.

• Cache state modelling configuration is now verified at simulation start and the simulation will exit with an error message if an incorrect configuration is detected in the platform. For example:

  Error: MyPlatform: Incompatible Cache Configuration 
  Cache state modelling is on in my_platform.cci 
  Cache state modelling is off in my_platform.core.l2_cache

• PVBus Fan out is not supported and a bus decoder is required in order to do this.

• When semi-hosting is enabled on SystemC model and a read from stdin is done within the target software, the semi-hosting call from CADI does not originate from the SystemC thread. Consequently the complete simulation becomes blocked if the semi-hosting call cannot complete due to no user input.

• Cache models may output debug messages on stderr even with --quiet.

• The Watchpoint mask does not have the expected effect.

• In some cases the Tarmac Trace reports an invalid physical address for some instructions. (In particular PA:0x000000000000).

• When writing to MDSCR_EL1.SS on AEMv8A, it does not change status until an ERET is executed. This should be consistently managed by the has_delayed_sysreg parameter.

• In some circumstances, the model will boot more slowly when an operating system filesystem image is used in read-only mode. The workaround is to make sure that the image is writeable.

• The shareable override functionality of CCI400 does not work. The slave interface shareable override register exists and may be read and written but has no functionality.

• The value of cpu.register_reset_data and cpu.scramble_unknowns_at_reset should be reflected in the bits of CNTHCTL_EL2 which reset value is UNKNOWN.

• When EL3 == AArch32 and executing in AArch32 Secure EL1 (SVC_s), an update of the CNTP_CTL_S causes the tarmac log to print an update of CNTPS_CTL_EL1.

• Breakpoints must be set after loading the image to be run, otherwise these will not be hit during execution even if the addresses are accessed.

• Elf object loader ignores SHT_REL/SHT_RELA sections.

• MAIR_ELx appear twice in the trace source SYSREG_UPDATE64.

• Cortex-A53, A35 and A32 lack the Advanced SIMD Engine-present parameter.

• A17 BROADCAST parameters should be at cluster level, not cpu level.

• Visual Studio configuration files default to Win32 for MTI examples.

• Trace plugin parameters cannot be set from a model parameter configuration file for any FVP. To workaround, set these parameters directly on the command line.

Outstanding tools issues

• ModelDebugger does not display the correct values for wTasKMaskId.

• The Cortex-M0 model exposes a VTOR register via CADI, but this register in not present in hardware.

Feedback on this product

If you have any comments or suggestions about this product, contact support-esl@arm.com and give:

• The product name.

• The product revision or version.

• An explanation with as much information as you can provide. Include symptoms and diagnostic procedures if appropriate.