Mali-G57 High Area Efficiency GPU

Arm Mali-G57 block diagram

About Mali-G57

The Arm Mali-G57 GPU is the first generation Valhall-based GPU for the mainstream market. Re-engineered to align with the Vulkan API, Mali-G57 brings higher-fidelity content to the mass market, from 4K/8K user interfaces in DTV to console-like graphics on smartphones. With 30% better performance density, 30% better energy efficiency for longer battery life, enhanced foveated rendering support for VR and up to 60% performance improvement for ML workloads, Mali-G57 pushes the boundaries on performance and efficiency for mainstream GPUs.

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Specifications

Features Value Description
Anti-Aliasing 4x MSAA
8x MSAA
16x MSAA
4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop.
API Support OpenGL® ES 1.1, 2.0, 3.1, 3.2
Vulkan 1.1
OpenCL™ 1.1, 1.2, 2.0 Full Profile
Renderscript
Full support for next-generation and legacy 2D/3D graphics applications.
Bus Interface AMBA®4 ACE, ACE-LITE and AXI Compatible with a wide range of bus interconnect and peripheral IP.
L2 Cache Configurable 64KB – 512KB
64KB-128KB for 1-Core.
128KB-256KB for 2-Core.
256KB for 3-Core.
1x256KB-2x256KB for 4-Core.
2x256KB-2x512KB for 5-Core and 6-Core configurations. 
Scalability 1 to 6 dual-pixel cores
Optimized for high area and energy efficiency to address mainstream device requirements.
Adaptive Scalable Texture Compression (ASTC) Low Dynamic Range (LDR) and High Dynamic Range (HDR).
Supports both 2D and 3D images.
ASTC offers several advantages over existing texture compression schemes by improving image quality, reducing memory bandwidth and thus energy use.
Arm Frame Buffer Compression (AFBC) Version 1.3
4x4 pixel block size
AFBC is a lossless image compression format that provides random access to pixel data to a 4x4 pixel block granularity. It is employed to reduce memory bandwidth both internally within the GPU and externally throughout the SoC.
Transaction Elimination 16x16 pixel block size Transaction Elimination spots the identical pixel blocks between two consecutive render targets and performs a partial update to the frame buffer with the changed pixel blocks only, which reduces memory bandwidth and thus energy.
Smart Composition  16x16 pixel block size Smart Composition extends the concept of Transaction Elimination to every stage of UI composition. Identical pixel blocks of input surfaces are not read, not processed for composition and not written to final frame buffer.
Foveated Rendering  3 levels of quality possible Foveated Rendering allows VR application to specify the shading rate to be used in each part of the screen. This helps the developer to reduce the workload of VR applications by selectively define the part of the screen that require less work from the GPU due to distortion introduced by the VR headset lenses.


Performance

Features Value Description
Frequency 850 MHz in 16nm
Throughput 1.7-10.2 Gpix/s in 16nm


  • A desktop, a folder, 3D shapes etc.
  • Development Tools for Graphics and Gaming

    A range of development tools to assist in the deployment of graphics applications and content on Mali GPUs.

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  • A phone, a tablet, game console etc.
  • Graphics and Gaming Development

    A collection of resources for developers targeting graphics and gaming applications on Mali GPUs.

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  • Compilation error
  • Cortex-M0+
0 votes 241 views 2 replies Latest 15 hours ago by Manuel Chavez Answer this
Answered A35 Power Mode Transitions 0 votes 1742 views 2 replies Latest 20 hours ago by EricDobbins Answer this
Answered Regarding the documentation on the T1 encoding of the MOV instruction on ARMv6-M architecture
  • Armv6-M
  • Documentation
0 votes 253 views 3 replies Latest 23 hours ago by B. Robertson Answer this
Not answered QSPI programming via DAP for M-3 Arty A-7 0 votes 43 views 0 replies Started yesterday by pmilanov Answer this
Suggested answer BURST option in AHB-to-AHB sync-up bridge 0 votes 2090 views 3 replies Latest yesterday by Hendricks Answer this
Suggested answer Why does Arm still support short descriptors?
  • Armv7-A
  • Armv8-A
  • Memory Management Unit (MMU)
0 votes 466 views 1 replies Latest yesterday by Andy Neil Answer this
Suggested answer Compiling error "system_MKL25Z4.h" file not found despite linker path provided Latest 15 hours ago by Manuel Chavez 2 replies 241 views
Answered A35 Power Mode Transitions Latest 20 hours ago by EricDobbins 2 replies 1742 views
Answered Regarding the documentation on the T1 encoding of the MOV instruction on ARMv6-M architecture Latest 23 hours ago by B. Robertson 3 replies 253 views
Not answered QSPI programming via DAP for M-3 Arty A-7 Started yesterday by pmilanov 0 replies 43 views
Suggested answer BURST option in AHB-to-AHB sync-up bridge Latest yesterday by Hendricks 3 replies 2090 views
Suggested answer Why does Arm still support short descriptors? Latest yesterday by Andy Neil 1 replies 466 views