Arm Mali-G77 GPU Block Diagram

About Mali-G77

The Arm Mali-G77 GPU (Graphics Processing Unit) is the first premium device GPU based on the innovative Valhall architecture. It provides a considerable boost in high-end graphics for premium solutions ranging from high fidelity games, intelligent mobile solutions to augmented reality (AR). More games are being ported from PC and console to mobile, with end users expecting a similar gaming experience on premium mobile devices. High fidelity gaming on mobile is steadily growing year on year, and mobile is now the largest gaming segment by revenue.

Mali-G77 provides 30% performance density uplift and 30% improvement on energy efficiency to drive mobile gaming experiences. This coupled with a 60% improvement in machine learning applications on previous generations will drive new and innovative experiences on next generation devices. All these numbers are ISO process and frequency and compared to last year’s premium Mali-G76 GPU. Mali-G77 has support for all latest APIs, including the latest releases of Vulkan and OpenCL.

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Specifications

Features Value Description
Anti-Aliasing 4x MSAA
8x MSAA
16x MSAA
4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop.
API Support OpenGL® ES 1.1, 2.0, 3.1, 3.2
Vulkan 1.1
OpenCL™ 1.1, 1.2, 2.0 Full Profile
Full support for next-generation and legacy 2D/3D graphics applications.
Bus Interface AMBA®4
ACE-LITE
Compatible with a wide range of bus interconnect and peripheral IP.
L2 Cache Configurable 512KB – 4MB
2 or 4 slices.
Scalability 7 to 16 Cores
Configurable from 7 to 16 cores delivering largest capability for a Mali GPU.
Adaptive Scalable Texture Compression (ASTC) Low Dynamic Range (LDR) and High Dynamic Range (HDR).
Supports both 2D and 3D images.
ASTC offers several advantages over existing texture compression schemes by improving image quality, reducing memory bandwidth and thus energy use.
Arm Frame Buffer Compression (AFBC) Version 1.3
4x4 pixel block size
AFBC is a lossless image compression format that provides random access to pixel data to a 4x4 pixel block granularity. It is employed to reduce memory bandwidth both internally within the GPU and externally throughout the SoC.

  • A desktop, a folder, 3D shapes etc.
  • Development Tools for Graphics and Compute Applications

    A range of development tools to assist in the deployment of graphics applications and content on Mali GPU based systems.

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  • A phone, a tablet, game console etc.
  • Mali Developer Center

    An online portal for a growing community of developers, technology partners, software vendors and content companies to create a thriving community around Mali embedded graphics IP.

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Answered How to do the ARM state change between 64-bit and 32-bit?
  • 32-bit
  • AArch64
  • Armv8-A
  • 64-bit
  • AArch32
0 votes 17384 views 9 replies Latest yesterday by murphy Answer this
Suggested answer ARMv8 memory ordering
  • Cortex-A53
  • Armv8-A
0 votes 947 views 3 replies Latest yesterday by a.surati Answer this
Suggested answer Fail to connect with CM0DSEvel
  • Cortex-M0
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0 votes 229 views 2 replies Latest 2 days ago by RickyChen Answer this
Answered How to specify virtual Address for pl011 uart in linux kernel
  • APB Peripherals
  • Arm11
  • PrimeCell UART (PL011)
  • Interrupt
0 votes 5483 views 9 replies Latest 2 days ago by barrysingh101 Answer this
Suggested answer Character recognition using NXP LPC1768 (Cortex-M3)
  • Neural Network
  • Cortex-M3
  • Arm NN
0 votes 344 views 3 replies Latest 2 days ago by Andy Neil Answer this
Suggested answer Cortex M0 Vector Table and Bootloading
  • Cortex-M0
  • Interrupt Handling
0 votes 274 views 1 replies Latest 2 days ago by Trampas Answer this
Answered How to do the ARM state change between 64-bit and 32-bit? Latest yesterday by murphy 9 replies 17384 views
Suggested answer ARMv8 memory ordering Latest yesterday by a.surati 3 replies 947 views
Suggested answer Fail to connect with CM0DSEvel Latest 2 days ago by RickyChen 2 replies 229 views
Answered How to specify virtual Address for pl011 uart in linux kernel Latest 2 days ago by barrysingh101 9 replies 5483 views
Suggested answer Character recognition using NXP LPC1768 (Cortex-M3) Latest 2 days ago by Andy Neil 3 replies 344 views
Suggested answer Cortex M0 Vector Table and Bootloading Latest 2 days ago by Trampas 1 replies 274 views