Artisan memory compilers

Arm Artisan SRAM, Register File and ROM Memory Compilers are the ideal choice for all types SoC designs, from mainstream to advanced deep submicron process nodes. Artisan High Speed, High Density and Ultra High Density Memory Architectures deliver optimized performance, power and area results for designs ranging from performance critical to cost sensitive and low power applications. The Artisan product portfolio covers over 15 foundries and numerous process variants.

FinFET memory compilers and instances

A wide variety of memory compilers with multiple periphery Vt options, power management modes and rich feature sets offers the SoC designer power, density or performance optimized single port, two port and dual port instances for a wide range of applications. Careful layout optimization ensures that each instance limits the impact of metal and via resistance, and the pattern-based design ensures high quality manufacturing results.

Bulk CMOS memory compilers and instances

Artisan Memory IP for bulk CMOS processes extends from 250nm to 22nm. Over 30 different compiler solutions with multiple periphery Vt options and rich feature sets, Arm offers the SoC designer power, density or performance optimized single port, two port and dual port instances for a wide range of applications. Multiple power management modes make possible the low leakage requirements for many of today’s designs. Carefully crafted architectures answer the market demands for high density and low-cost solutions. Key feature sets include dual power rails to enable advanced power saving modes and DVFS operation; integrated source biasing for leakage reduction during retention mode; and ECC, BIST, and redundancy to improve yield and post silicon performance tuning.

SOI memory compilers and instances

Arm has a long history with SOI products, starting with partially depleted SOI (PDSOI). Fully depleted SOI (FDSOI) compilers and instances are now part of the Artisan memory IP portfolio, enabling the same modeling and implementation for FDSOI SoC blocks as is used for bulk CMOS technology. The industry’s first eMRAM compiler is now part of the Artisan memory offering, providing end-users the ability to replace Flash, EEPROM and slow SRAM/data buffer memories with a single, fast, non-volatile memory.

Memory validation

Artisan memory compilers and instances undergo rigorous design assurance and view validation checks. The analysis and validation are done on stand-alone instances, the tiles that make up the memory compilers, and within standard EDA flows from synthesis through GDSII creation to ensure products of the highest quality. Integration tests are run by the development teams, the POP IP implementation teams and Arm processor teams to ensure clean end-user designs. Silicon testing is performed across process corners, voltages and temperatures; test chip reports are available on request.

Arm DesignStart

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