The Cortex-A15 is a high-performance processor that implements the Armv7-A architecture

The Cortex-A15 has enjoyed proven success, with shipments in excess of 50 million units across a variety of smartphones and infrastructure applications. The processor cluster has one to four cores. Each core has its own L1 instruction and data caches, together with a single shared L2 unified cache.

Information on Cortex-A15.
Architecture Armv7-A
Multicore 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 4 ACE technology. Compatible with CCI-400 for up to two clusters, CCI-504 for up to four clusters, and a large level 3 cache for optimal performance.
ISA Support
  • Armv7-A
  • Thumb-2
  • TrustZone security technology
  • Neon Advanced SIMD
  • DSP & SIMD extensions
  • VFPv4 Floating point
  • Hardware virtualization support
  • Large Physical Address Extensions (LPAE)
  • Integer Divide
  • Fused MAC
  • Hypervisor debug instructions
Memory Management Unit (MMU)
Armv7 Memory Management Unit
Debug and Trace

Performance graph on Cortex-A15 to Cortex-A9.


The Cortex-A15 features a highly out-of-order processing engine with a 15 stage pipeline. This enables it to meet the requirements of modern day mobile computing where it must meet two opposite targets; high responsiveness or frame rate for gaming and web surfing, alongside maximizing the battery life to deliver an untethered user experience.

In a single-core configuration, the Cortex-A15 processor can achieve greater performance than the Cortex-A9 processor in key functions. This makes the processor ideal for devices which have rich functionality or need to execute functions at high speeds.

In order for devices to meet both targets simultaneously, Arm has invented big.LITTLE technology. By offering a ‘right core for the right task’ solution, devices can benefit from impressive power savings. Arm’s big.LITTLE technology assigns background and light tasks to the “LITTLE” core and the primary larger tasks to the “big” core. Not only does this allow the larger core to operate more efficiently as it is not trying to continuously context switch to cover the light threads, the consumer benefits from greatly increased battery life alongside top-end performance that can be greater than an individual Cortex-A15 core.

The Cortex-A15 processor can be implemented in a single or multicore configuration and can be paired with the Cortex-A7 to enable big.LITTLE configurations. This means that the processor provides a range of solutions for different use cases.