Cortex-A5

Getting Started

The Cortex-A5 processor offers high performance with a low-power consumption, addressing a variety of feature-rich and Linux-capable embedded and IoT applications.

Specifications

Architecture	Armv7-A
Multicore	1-4 cores
Instruction Cache	4K-64K
Data Cache	4K-64K
Floating point unit	Optional (VFPv4)
MMU	Arm7 MMU
Neon, SIMD architecture instruction	Optional
DSP extensions	Optional
ETM	Optional
ACP port	Optional (only multi-processor)
Memory Management Unit (MMU)	Armv7 Memory Management Unit
Debug and Trace	CoreSight

Characteristics

The processor’s small physical size means reduced manufacturing costs, reduced system leakage and increased low-cost integration. Compared to the Cortex-A9 processor, the Cortex-A5 achieves more than 50% power efficiency while maintaining around 70-75% of the same performance level, making it ideal for wearable technology.

The Cortex-A5 processor is designed to be a highly configurable processor. The instruction and data cache sizes, for example, can be configured from a 64KB maximum size to as small as 4KB for cost-sensitive applications requiring a small application processor with a Memory Management Unit (MMU).

Advanced CPU

Up to 4x CPU cores for maximum performance and load sharing
Hardware coherency for easy data sharing
Advanced data processing with SIMD engine

High efficiency

Small footprint for minimal power consumption

AMBA standards

AXI3 bus interfaces
Coresight debug and trace

Easy integration of accelerators

High performance Advanced Accelerator Port (ACP) for fast connection to machine learning and custom accelerators

Hardware security with Arm TrustZone technology

Industry proven security built into the CPU

Memory Management Unit (MMU)

Supports rich operating systems including Linux, with an Armv7 MMU

Highly configurable to address diverse requirements

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.

Learn more

Fast and low-cost access to Cortex-A5 processor

With Arm DesignStart, you can get access to Cortex-A5, along with a comprehensive list of system IP, for building custom silicon designs based on Cortex-A5. The Cortex-A5 DesignStart package offers:

Arm Cortex-A5 processor with Neon media processing engine
Configurable AXI interconnect and configuration engine
Level 2 cache for Cortex-A5
A pre-rendered CoreSight subsystem
CoreSight ETM for Cortex-A5
SRAM Controller
Watchdog peripheral
Timer peripheral
UART peripheral
General purpose I/O peripheral
Real Time Clock peripheral

Learn about the features in the Cortex-A5 DesignStart.

Cortex-A5 DesignStart

Cortex-A5 Technical Reference Manual

The main resource for hardware and software engineers implementing the Cortex-A5 processor in system designs.

Read here
Cortex-A Series Programmer's Guide for Armv7-A

Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for Armv7-A.

Get the guide
Development Tools for Cortex-A

Arm and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.

Learn more

Related IP

The Cortex-A5 processor can be incorporated into an SoC using a broad range of Arm technology including Graphics IP, System IP, and Physical IP. The Cortex-A5 processor is fully supported by Arm development tools. Related IP includes:

Graphic IP	Other IP	Tools
Mali-400 GPU	CoreLink Network Interconnect Family CoreLink System Controllers Interrupt Controllers CoreSight SoC-400 POP IP	DS-5 Development Studio Fixed Virtual Platforms Development Boards Arm Compiler Fast Models

Cortex-A comparison table (Armv7-A)

Feature	Cortex-A5	Cortex-A7	Cortex-A9	Cortex-A15	Cortex-A17
Instruction set architecture and extensions	Armv7-A	Armv7-A LPAE Virtualization	Armv7-A	Armv7-A LPAE Virtualization	Armv7-A LPAE Virtualization
Pipeline	In order	In order	Out of order	Out of order	Out of order
Superscalar	No	Partial	Yes	Yes	Yes
Neon and Floating Point Unit	Optional	Optional	Optional	Optional	Included
Floating Point Unit only	Optional	Optional	Optional	Optional	Included
Cryptography Unit	No	No	No	No	No
Physical Addressing (PA)	32-bit	40-bit	32-bit	40-bit	40-bit
Dual Core Lock-Step (DCLS)	No	No	No	No	No
L1 I-Cache / D-Cache	4k-64k	8k-64k	16k-64k	32kB/32kB	32k-64k/32k
L2 Cache	External L2C-310	Up to 1MB	External L2C-310	512kB-4MB	256kB-8MB
L3 Cache	NA	NA	NA	NA	NA
ECC / Parity		No	Yes	Yes	L2 only
LPAE	No	Yes	No	Yes	Yes
Bus Interfaces	AXI	ACE	AXI	ACE or CHI	ACE
ACP	Optional	No	Optional	Optional	Optional
Peripheral Port			No	No	Yes
Functional Safety Support
Security	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone
Interrupt Controller	Optional Integrated GIC v1 (MP only)	Optional Integrated GIC v2	Internal Integrated GIC v1 (MP only)	Optional Integrated GICv2	External GICv2
Generic Timer	No	Yes	Yes	Armv8-A	Armv8-A

Cortex-A comparison table (Armv8-A)

Feature	Cortex-A32	Cortex-A34	Cortex-A35	Cortex-A53	Cortex-A55	Cortex-A57	Cortex-A65	Cortex-A65AE	Cortex-A72	Cortex-A73	Cortex-A75	Cortex-A76	Cortex-A76AE	Cortex-A77
Instruction set architecture and extensions	Armv8-A AArch32 only	Armv8-A AArch64 only	Armv8-A	Armv8-A	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product	Armv8-A	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only)	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product	Armv8-A	Armv8-A	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product	Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product
Pipeline	In order	In order	In order	In order	In order	Out of order	Out of order	Out-of-order	Out of order	Out of order	Out-of-order	Out-of-order	Out-of-order	Out-of-order
Superscalar				Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Neon and Floating Point Unit	Optional	Optional	Optional	Optional	Optional	Included	Included	Included	Included	Included	Included	Included	Included	Included
Floating Point Unit only	N/A	N/A	N/A	N/A	Optional	Included	Included	Included	Included	Included	Included	Included	Included	Included
Cryptography Unit	Optional	Optional	Optional	Optional	N/A	Optional	Optional	Optional	Optional	Optional	Optional	Optional	Optional	Optional
Physical Addressing (PA)	40-bit	40-bit	40-bit	40-bit	40-bit	40-bit	44-bit	44-bit	44-bit	40-bit	44-bit	40-bit	40-bit	40-bit
Dual Core Lock-Step (DCLS)	No	No	No	No	No	No	No	Yes (in safety-mode)	No	No	No	No	Yes (in safety-mode)	No
L1 I-Cache / D-Cache	8k-64k	8k-64k	8k-64k	8k-64k	16kB-64kB	48kB/32kB	16KB to 64KB	16KB to 64KB	48KB/32kB-64kB	32k/32k-64k	64KB	64KB	64KB	64KB
L2 Cache	128KB-1MB	128KB-1MB	128KB-1MB	128KB-2MB	64kB-256kB	512kB-2MB	64KB to 256KB	64KB to 256KB	512kB-4MB	256k-8MB	256KB to 512KB	256KB to 512KB	256KB to 512KB	256KB to 512KB
L3 Cache	NA	NA	NA	NA	Optional From 256kB to 4MB	NA	Optional 512KB to 4MB	Optional 512KB to 4MB	NA	NA	Optional 512KB to 4MB	Optional 512KB to 4MB	Optional 512KB to 4MB	Optional 512KB to 4MB
ECC / Parity	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	L2 only	Yes	Yes	Yes	Yes
LPAE	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Bus Interfaces	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI	ACE	ACE or CHI	ACE or CHI	ACE or CHI	ACE or CHI
ACP	Optional	Optional	Optional	Optional	Optional	Yes	Optional	Optional	Optional	Yes	Optional	Optional	Optional	Optional
Peripheral Port					Optional		Optional	Optional			Optional	Optional	Optional	Optional
Functional Safety Support	Yes	Yes	Yes	Yes	Yes	Yes		Yes	Yes		Yes	Yes	Yes	Yes
Security	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone	TrustZone
Interrupt Controller	External GICv3	External GICv3	External GICv3	External GICv3	External GICv4	External GICv3	External GICv4	External GICv4	External GICv3	External GICv3	External GICv4	External GICv4	External GICv4	External GICv4
Generic Timer	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A	Armv8-A

Community Blogs

Pre-silicon Software Development with Arm Models for Cortex-A5 DesignStart

Cortex-A5 DesignStart: Take advantage of the fast simulation models of the CPU with a pre-validated, configurable reference (subsystem) design to reduce device complexity and speed-up software development.

3 months ago by Rob Kaye

Case study: Evolving intelligent devices for immersive experiences

Discover how Inuitive developed a highly capable computer vision processor with the smallest possible footprint for use in AR,VR, drones and robotics applications with the Arm Cortex-A5 processor.

9 months ago by Chris Shore

A look inside the Cortex-A5 CPU, available through DesignStart

Arm expanded its fast-access IP program to include the Linux-capable Arm Cortex-A5 processor. Find out the four big aspects that make Cortex-A5 DesignStart stand out and what is included in the program.

1 years ago by Chris Shore

7 reasons why fast, low-cost access to a Linux-capable, Arm CPU is great ne

By adding Cortex-A5 to the DesignStart program, developers now have fast, low-cost access to a high-performing, ultra-efficient CPU that is ideal for a wide range of embedded and IoT applications.

1 years ago by Phil Burr

Why is SoC Design so hard?

The exploding IoT (Internet of Things) chip market is expected to reach 20 billion devices by 2020 by many predictions. The majority of these will NOT be wearables. The IoT market will be driven by Data and Subscription business models.

2 years ago by Jim

圆形电脑Endless Mini,一款有助缩小数字鸿沟的产品

现在越来越多的人都能感受到互联网带来的便利。根据世界银行的最新报告显示，在过去十年里，网民的数量从2005年的仅10亿增加到2015年底的30亿，总体增长至三倍以上。网民只需手指轻轻点击电脑，就可查询信息，获取大量机会。一家总部在旧金山的公司研发了Endless Mini。研发人员表示，Endless Mini旨在为更多的人们提供一台价格便宜的笔记本电脑，Endless Mini的潜在客户是那些无法链接internet的人，或者电脑新手。Endless Mini是微型版的个人电脑，用户可利用他们

3 years ago by Song Bin 宋斌

Community Forums

Suggested answer	Processor halt in __libc_init_array assembler function	309 views	4 replies	Latest 6 hours ago by lammers7	Answer this
Suggested answer	flush_cache_all() API consuming 200+ microseconds.	682 views	5 replies	Latest yesterday by vaiyawa	Answer this
Suggested answer	R5 vs A9 Performances Cortex-A9 Cortex-R5	1495 views	9 replies	Latest yesterday by Poz1	Answer this
Suggested answer	Where can I apply for cortex m0/m3 IP with GDSII files	200 views	1 replies	Latest 2 days ago by Andy Neil	Answer this
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Suggested answer	Is it typical at least 2 cycles taken for load from and store to a zero wait state accessible memory? Memory Access Instructions	438 views	4 replies	Latest 2 days ago by 42Bastian Schick	Answer this

Suggested answer	Processor halt in __libc_init_array assembler function Latest 6 hours ago by lammers7	4 replies 309 views
Suggested answer	flush_cache_all() API consuming 200+ microseconds. Latest yesterday by vaiyawa	5 replies 682 views
Suggested answer	R5 vs A9 Performances Latest yesterday by Poz1	9 replies 1495 views
Suggested answer	Where can I apply for cortex m0/m3 IP with GDSII files Latest 2 days ago by Andy Neil	1 replies 200 views
Not answered	Where can I apply for cortex m0/m3 IP with GDSII files Started 2 days ago by rin	0 replies 49 views
Suggested answer	Is it typical at least 2 cycles taken for load from and store to a zero wait state accessible memory? Latest 2 days ago by 42Bastian Schick	4 replies 438 views

Cortex-A5

The Arm Cortex-A5 processor is the smallest application processor in the Cortex-A family of processors.

Getting Started

Specifications