The Cortex-A57 processor is a high-performance processor that implements the Armv8-A architecture, which can be paired with the Cortex-A53 processor in a big.LITTLE configuration for mobile applications.

The Cortex-A57 processor cluster has one to four cores, each with their L1 instruction and data caches, together with a single shared L2 unified cache.

Information on Cortex-A57.
Architecture Armv8-A
Multicore 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 5 CHI or AMBA 4 ACE technology
ISA Support
  • AArch32 for full backward compatibility with Armv7
  • AArch64 for 64-bit support and new architectural features
  • TrustZone security technology
  • Neon advanced SIMD
  • DSP & SIMD extensions
  • VFPv4 floating point
  • Hardware virtualization support
Debug and Trace

Arm Security Algorithm Accelerators

Download the hardware block:

Cortex-A57_Security_Algorithm_Accelerator.tar.gz 763 KB