The Cortex-A65 is a multithreaded Cortex-A CPU. It is designed for devices undertaking high throughput and non-safety critical tasks. The Cortex-A65 is built on DynamIQ technology and benefits from its resilient and flexible multicore features.
||Neon/Floating Point Unit
||Max number of CPUs in cluster
| Pysical Addressing (PA)
||Dual Core Lock-Step (DCLS)
|Memory system and external interfaces
||16KB to 64KB|
||Optional, 512KB to 4MB
| Bus interfaces
||AMBA ACE or CHI|
| Peripheral Port
||GIC interface, GICv4|
|Debug||Armv8-A (plus Armv8.2-A extensions)
|Embedded Trace Macrocell||ETMv4.2 (instruction trace)
- High throughput performance with dual-threaded, out-of-order execution.
- Compatible with DynamIQ technology for flexible, resilient systems.
- High bandwidth, low latency ACP interface for closely coupled accelerators.
Cortex-A comparison table for Armv7-A and Armv8-A
Download the following PDF datasheet to compare the specifications of Cortex-A Armv7-A and Armv8-A processors.