Specifications
The Cortex-A72 processor can be paired with the Cortex-A53 processor in a big.LITTLE configuration for a wide array of applications including mobile, embedded and automotive. The Cortex-A72 processor cluster has one to four cores, each with their L1 instruction and data caches, together with a single shared L2 unified cache.
Arm Cortex-A72 CPU
| Architecture | Armv8-A |
| Multicore | 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 5 CHI or AMBA 4 ACE technology |
| ISA Support |
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| Debug and Trace |
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Compare the specifications of Cortex-A Armv7-A and Armv8-A processors:
Arm Security Algorithm Accelerators
Download the hardware block:
| Cortex-A72_Security_Algorithm_Accelerator.tar.gz | 966 KB |
Key Features
Triple-Issue Out-of-Order Pipeline
Dispatch and computational bandwidth improvements over Cortex-A57 have maximize the effectiveness of the triple-issue out-of-order pipeline to remove code dependencies for achieving high peak and sustained instruction throughputs at frequencies above 3GHz in 16FF+ process technology.
Advanced Branch Predictor
A sophisticated new algorithm drastically improves prediction accuracy which reduces wasted energy consumption from executing down a wrong code path.