Specifications

The Cortex-A73 processor is a highly-efficient high-performance processor.

The Cortex-A73 processor can be paired with the Cortex-A53 or Cortex-A35 processor in a big.LITTLE configuration for an array of mobile and embedded devices. The Cortex-A73 processor cluster has one to four cores, each with their L1 instruction and data caches, together with a single shared L2 unified cache.

Information on Cortex-A73.

Arm Cortex-A73 CPU

Architecture  Armv8-A
Multicore 1-4x Symmetrical Multiprocessing (SMP) within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 4 ACE technology
ISA Support
  • AArch32 for full backward compatibility with Armv7
  • AArch64 for 64-bit support and new architectural features
  • TrustZone security technology
  • Neon advanced SIMD
  • DSP & SIMD extensions
  • VFPv4 floating point
  • Hardware virtualization support
Debug & Trace

Key features

Efficient Out-of-Order Pipeline
Microarchitecture performance and power improvements to maximize efficiency of the 2-wide out-of-order pipeline. High and sustained performance at frequencies up to 2.8GHz in advanced process technology for premium smartphones.

State-of-the-art Branch Prediction and Power-Optimized Instruction Fetching
Advanced sophisticated prediction algorithm with power-optimized 64kB instruction cache.

High-performance Memory System
Full out-of-order dual-issue load/store capability combined with up to 64kB data cache. Enhanced data prefetching with automatic complex pattern detection.

Optimized mobile and consumer feature set
Combined with Cortex-A53 or Cortex-35 in big.LITTLE configuration using Arm CCI interconnect for high scalability.

Cortex-A comparison table (Armv7-A)

Feature Cortex-A5 Cortex-A7 Cortex-A9 Cortex-A15 Cortex-A17
Instruction set architecture and extensions Armv7-A Armv7-A
LPAE Virtualization		 Armv7-A Armv7-A
LPAE Virtualization		 Armv7-A
LPAE Virtualization
Pipeline In order In order Out of order Out of order Out of order
Superscalar No Partial Yes Yes Yes
Neon and Floating Point Unit Optional Optional Optional Optional Included
Floating Point Unit only Optional Optional Optional Optional Included
Cryptography Unit No No No No No
Physical Addressing (PA) 32-bit 40-bit 32-bit 40-bit 40-bit
Dual Core Lock-Step (DCLS) No No No No No
L1 I-Cache / D-Cache 4k-64KB 8k-64KB 16k-64KB 32KB/32KB 32k-64KB/32KB
L2 Cache External L2C-310 Up to 1MB External L2C-310 512KB-4MB 256KB-8MB
L3 Cache NA NA NA NA NA
ECC / Parity   No Yes Yes L2 only
LPAE No Yes No Yes Yes
Bus Interfaces AXI ACE AXI ACE or CHI ACE
ACP Optional No Optional Optional Optional
Peripheral Port     No No Yes
Functional Safety Support          
Security TrustZone TrustZone TrustZone TrustZone TrustZone
Interrupt Controller Optional Integrated GIC v1 (MP only) Optional Integrated GIC v2 Internal Integrated GIC v1 (MP only) Optional Integrated GICv2 External GICv2
Generic Timer No Yes Yes Armv8-A Armv8-A

Cortex-A comparison (Armv8-A)

Feature Cortex-A32 Cortex-A34 Cortex-A35 Cortex-A53 Cortex-A55 Cortex-A57 Cortex-A65 Cortex-A65AE Cortex-A72 Cortex-A73 Cortex-A75 Cortex-A76 Cortex-A76AE Cortex-A77 Cortex-A78
Instruction set architecture and extensions Armv8-A AArch32 only Armv8-A AArch64 only Armv8-A Armv8-A Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product Armv8-A Armv8-A
AArch64
only

Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only)		 Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product Armv8-A Armv8-A Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product Armv8-A
AArch64,
AArch32 at EL0

Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product		 Armv8-A
AArch64,
AArch32 at EL0

Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product		 Armv8-A
AArch64
AArch32 at EL0

Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product
 Armv8-A, Armv8.1 extensions, Armv8.2 extensions, Cryptography extensions, RAS extensions, Armv8.3 (LDAPR instructions only), Armv8.4 Dot Product
Pipeline In order In order In order In order In order Out of order Out of order Out-of-order Out of order Out of order Out-of-order Out-of-order Out-of-order Out-of-order
 Out-of-order
Superscalar       Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
 Yes
Neon and Floating Point Unit Optional Optional Optional Optional Optional Included Included Included Included Included Included Included Included Included
 Included
Floating Point Unit only N/A N/A N/A N/A Optional Included Included Included Included Included Included Included Included Included
 Included
Cryptography Unit Optional Optional Optional Optional Optional Optional Optional Optional Optional Optional Optional Optional Optional Optional
 Optional
Physical Addressing (PA) 40-bit 40-bit 40-bit 40-bit 40-bit 40-bit 44-bit 44-bit 44-bit 40-bit 44-bit 40-bit 40-bit 40-bit
 40-bit
Dual Core Lock-Step (DCLS) No No No No No No No Yes (in safety-mode) No No No No Yes (in safety-mode) No
 No
L1 I-Cache / D-Cache 8KB-64KB 8KB-64KB 8K-64KB 8KB-64KB 16KB-64KB 48KB/32KB 16KB to 64KB 16KB to 64KB 48KB/32KB-64KB 32KB/32KB-64KB 64KB 64KB 64KB 64KB
 64KB
L2 Cache 128KB-1MB 128KB-1MB 128KB-1MB 128KB-2MB 64KB-256KB 512KB-2MB 64KB to 256KB 64KB to 256KB 512KB-4MB 256KB-8MB 256KB to 512KB 256KB to 512KB 256KB to 512KB 256KB to 512KB
 256KB to 512KB
L3 Cache NA NA NA NA Optional
From 256KB to 4MB		 NA Optional 512KB to 4MB Optional 512KB to 4MB NA NA Optional 512KB to 4MB Optional 512KB to 4MB Optional 512KB to 4MB Optional 512KB to 4MB
 Optional 512KB to 4MB
ECC / Parity Yes Yes Yes Yes Yes Yes Yes Yes Yes L2 only Yes Yes Yes Yes
 Yes
LPAE Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes
 Yes
Bus Interfaces ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE or CHI ACE ACE or CHI ACE or CHI ACE or CHI ACE or CHI
 ACE or CHI
ACP Optional Optional Optional Optional Optional Yes Optional Optional Optional Yes Optional Optional Optional Optional
 Optional
Peripheral Port         Optional   Optional Optional     Optional Optional Optional Optional
 Optional
Functional Safety Support Yes Yes Yes Yes Yes Yes   Yes Yes   Yes Yes Yes Yes
 ASIL D systematic
Security TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone TrustZone
 TrustZone
Interrupt Controller External
GICv3		 External
GICv3		 External
GICv3		 External
GICv3		 External
GICv4		 External
GICv3		 External
GICv4		 External
GICv4		 External
GICv3		 External
GICv3		 External
GICv4		 External
GICv4		 External
GICv4		 External
GICv4
 External
GICv4
Generic Timer Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A Armv8-A
 Armv8-A