The Arm Cortex-A75 processor is a high performance application CPU delivering high performance and power efficiency across a wide range of applications.
First-generation CPU built on DynamIQ technology, enabling high levels of scalability and responsiveness for advanced use cases.
The processor is broadly applicable from cloud to edge, providing improvements in performance, efficiency, and architecture over its predecessors. With significantly improved integer performance, and substantial enhancements in floating point and memory workloads performance, the Cortex-A75 processor provides a suitable solution for an array of devices.
This additional compute capability, combined with improvements for machine learning and other advanced use cases, will enable demanding applications to run more smoothly.
Arm Cortex-A75 CPU
Armv8.3 (LDAPR instructions only)
||A64, A32, and T32 instruction sets
|Neon / Floating Point Unit||Included|
|Max Number of CPUs in Cluster||Four (4)|
|Physical Addressing (PA)||44-bit|
|Memory System and External Interfaces||L1 I-Cache / D-Cache||64KB
|L2 Cache||128KB to 512KB|
|L3 Cache||Optional 512KB to 4MB|
|Bus Interfaces||ACE or CHI|
|Other||Functional Safety Support||Safety package|
|Interrupts||GIC Interface, GICv4|
|Debug||Armv8-A (plus Armv8.2-A extensions)|
|Embedded Trace Macrocell||ETMv4.2 (instruction trace)
Compare the specifications of Cortex-A Armv7-A and Armv8-A processors: