Cortex-A76

Specifications

The Arm Cortex-A76 CPU delivers laptop-class performance with smartphone efficiency, bringing the same experience to all classes of intelligent mobile compute devices.

The second generation premium core built on DynamIQ technology. Paired with a Cortex-A55 CPU in a scalable DynamIQ big.LITTLE configuration, Cortex-A76 delivers laptop-class performance with mobile efficiency, bringing the mobile experience (fast responsiveness, always on, always connected) into all classes of intelligent mobile compute devices. With superior energy efficiency and far greater single-threaded performance, Cortex-A76 CPU extends battery life and improves user experience for sustained high performance across even the most complex compute tasks.

Architecture	Armv8-A (Harvard)
Extensions	Armv8.1 extensions Armv8.2 extensions Cryptography extensions RAS extensions Armv8.3 (LDAPR instructions only)
ISA support	A64 A32 and T32 (at the EL0 only)
Microarchitecture	Pipeline	Out-of-order
	Superscalar	Yes
	Neon / Floating Point Unit	Included
	Cryptography Unit	Optional
	Max number of CPUs in cluster	Four (4)
	Physical addressing (PA)	40-bit
Memory system and external interfaces	L1 I-Cache / D-Cache	64KB
	L2 Cache	128KB to 512KB
	L3 Cache	Optional, 512KB to 4MB
	ECC Support	Yes
	LPAE	Yes
	Bus interfaces	AMBA ACE or CHI
	ACP	Optional
	Peripheral Port	Optional
Other	Functional Safety Support	ASIL D systematic
	Security	TrustZone
	Interrupts	GIC interface, GICv4
	Generic timer	Armv8-A
	PMU	PMUv3
	Debug	Armv8-A (plus Armv8.2-A extensions)
	CoreSight	CoreSightv3
	Embedded Trace Macrocell	ETMv4.2 (instruction trace)

Key documents

Other key resources

Specifications

Key benefits

Key features compared to Cortex-A75