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Cortex-A9 Technical Reference Manual
For system designers and software engineers, the Cortex-A9 manual provides information on implementing and programming Cortex-A9 based devices.
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Cortex-A Series Programmer's Guide for Armv7-A
Common to all Cortex-A series processors, this programmer's guide is useful for assembly and C language application development for Armv7-A.
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Development Tools for Cortex-A
Arm and our partners provide specialist code generation, debug and analysis tools for software development on Cortex-A series processors, such as DS-5 Development Studio.
Development Tools
Community Forums
| Suggested answer | how to handle lockup state in M33 | 0 votes | 387 views | 11 replies | Latest 6 hours ago by David Wang | Answer this |
| Suggested answer | IRQ in c++ not redirecting correct address | 0 votes | 53 views | 1 replies | Latest 12 hours ago by 42Bastian Schick | Answer this |
| Suggested answer | Enabling SWO output in Cortex M3 DesignStart FPGA Xilinx edition? | 0 votes | 118 views | 1 replies | Latest 16 hours ago by jpthibault | Answer this |
| Suggested answer | volatile variable position in the stack (ABI std) | 0 votes | 190 views | 5 replies | Latest yesterday by 42Bastian Schick | Answer this |
| Not answered | Context protection when calling a secure function(NSC) in a non-secure interrupt function | 0 votes | 64 views | 0 replies | Started 5 days ago by Yang Zhang | Answer this |
| Answered | Synchronization of caches on ARMv8 | 0 votes | 199 views | 2 replies | Latest 5 days ago by Martin Weidmann | Answer this |
| Suggested answer | how to handle lockup state in M33 Latest 6 hours ago by David Wang | 11 replies 387 views |
| Suggested answer | IRQ in c++ not redirecting correct address Latest 12 hours ago by 42Bastian Schick | 1 replies 53 views |
| Suggested answer | Enabling SWO output in Cortex M3 DesignStart FPGA Xilinx edition? Latest 16 hours ago by jpthibault | 1 replies 118 views |
| Suggested answer | volatile variable position in the stack (ABI std) Latest yesterday by 42Bastian Schick | 5 replies 190 views |
| Not answered | Context protection when calling a secure function(NSC) in a non-secure interrupt function Started 5 days ago by Yang Zhang | 0 replies 64 views |
| Answered | Synchronization of caches on ARMv8 Latest 5 days ago by Martin Weidmann | 2 replies 199 views |
