Arm Cortex-M Series Processors

The Cortex-M processor family is optimized for cost and energy-efficient microcontrollers. These processors are found in a variety of applications, including IoT, industrial and everyday consumer devices.

The processor family is based on the M-Profile Architecture that provides low-latency and a highly deterministic operation, for deeply embedded systems. Our latest generation Cortex-M processor is the Cortex-M55, the first built on the Armv8.1-M architecture with Arm Helium technology, a vector processing extension. The Cortex-M55 brings enhanced levels of machine learning and signal processing performance to the next wave of small embedded devices, from wearables to smart speakers and beyond.

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  • Cortex-M55

    The Arm Cortex-M55 processor is Arm’s most AI-capable Cortex-M processor and the first to feature Arm Helium vector processing technology.

  • Cortex-M35P

    A tamper-resistant Cortex-M processor with optional software isolation using TrustZone for Armv8-M.

  • Cortex-M33

    The Arm Cortex-M33 processor has an ideal blend of real-time determinism, efficiency and security.

  • Cortex-M23

    The Arm Cortex-M23 is the smallest and lowest power microcontroller with TrustZone security.

  • Cortex-M7

    The Arm Cortex-M7 processor is the highest performance member of the energy-efficient Cortex-M processor family.

  • Cortex-M4

    The Arm Cortex-M4 processor implements a good blend of control and performance for mixed-signal devices.

  • Cortex-M3

    The Arm Cortex-M3 processor is the industry-leading 32-bit processor for highly deterministic real-time applications.

  • Cortex-M1

    The Arm Cortex-M1 processor targets FPGA devices. It is available to access instantly with DesignStart FPGA.

  • Cortex-M0+

    The Arm Cortex-M0+ processor is the most energy efficient Arm processor available.

  • Cortex-M0

    The Arm Cortex-M0 processor is the smallest Arm processor available.
Cortex-M comparison table
Feature  Cortex-M0 Cortex-M0+ Cortex-M1 Cortex-M23 Cortex-M3 Cortex-M4  Cortex-M33 Cortex-M35P  Cortex-M55
 Cortex-M7 
Instruction Set Architecture  Armv6-M Armv6-M
 Armv6-M
 Armv8-M Baseline 
 Armv7-M Armv7-M
 Armv8-M Mainline
 Armv8-M Mainline
 Armv8.1-M Mainline
Helium
 Armv7-M
Thumb, Thumb-2  Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb,
Thumb-2
 Thumb,
Thumb-2
 Thumb,
Thumb-2
 Thumb,
Thumb-2
DMIPS/MHz range*
 0.87-1.27  0.95-1.36  0.8
 0.98 1.25-1.89  1.25-1.95  1.5  1.5   1.6 2.14-3.23
CoreMark®/MHz*
 2.33 2.46  1.85
 2.64 3.34 3.42  4.02 4.02  4.2 5.01
Pipeline Stages
 3  2  3  2  3  3  3  3   4 6 
Memory Protection Unit (MPU)  No  Yes (option) No  Yes (option)
(2 x) 		 Yes (option)  Yes (option)  Yes (option)
(2 x) 		 Yes (option)
(2 x) 		 Yes (option) (2 x)
 Yes (option) 
Maximum MPU Regions  0  8  0  16  8  8  16  16  16
 16 
Trace (ETM or MTB)  No  MTB (option)  No  MTB (option) or 
ETMv3 (option) 		 ETMv3 (option)  ETMv3 (option)  MTB (option) and/or
ETMv4 (option) 		 MTB (option) and/or
ETMv4 (option)  		ETMv4 (option)
 ETMv4 (option)
Digital Signal Processing (DSP) extension
 No  No  No  No  No Yes  Yes (option) Yes (option)  Yes (option)
 Yes 
Floating Point Hardware  No No  No  No  No Yes (scalar SP) Yes (scalar SP) Yes (scalar SP) Yes (scalar HP +
SP + DP) (vector
HP + SP)
 Yes (scalar SP + DP) 
Systick Timer
 Yes (option)  Yes (option)  Yes (option)  Yes (2 x)  Yes Yes Yes (2 x) Yes (2 x) Yes (2 x)
 Yes
Built-in Caches  No No No  No No No No  Yes (option 2- 16kB Yes (option)
 Yes (option 4-64kB 
 I-cache I-cache and D-cache
 I-cache, D-cache) 
Tightly Coupled Memory  No  No  Yes  No  No  No  No  No  Yes
(option 0-16MB
I-TCM/D-TCM)
 Yes
(option 0-16MB
I-TCM/D-TCM) 
TrustZone for Armv8-M
 No No No Yes (option)  No  No  Yes (option) Yes (option)  Yes (option)
 No 
Coprocessor Interface  No  No  No  No  No  No  Yes (option)  Yes (option)  Yes (option)
No 
Bus Protocol
 AHB Lite  AHB Lite, Fast I/O  AHB Lite  AHB5, Fast I/O  AHB Lite, APB   AHB Lite, APB  AHB5, APB AHB5, APB AXI5 (main bus), AHB
(peripheral bus,
TCM slave port and debug)
 AXI4, AHB Lite, APB, TCM
Wake-up Interrupt Controller Support
 Yes Yes  No  Yes  Yes  Yes  Yes  Yes  Yes
 Yes 
Integrated Interrupt Controller (NVIC)
 Yes  Yes  Yes  Yes  Yes  Yes  Yes Yes  Yes  Yes 
Maximum # External Interrupts
 32  32  32  240  240  240  480 480 480
 240  
Hardware Divide  No No  No  Yes  Yes  Yes  Yes  Yes Yes
 Yes 
Single Cycle Multiply
 Yes (option) Yes (option)  No  Yes  Yes  Yes  Yes  Yes  Yes
 Yes 
CMSIS Support
 Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes
 Yes 
Dual Core Lock-Step Support
 No No No Yes  No No Yes Yes  No
 Yes 
Arm Custom Instructions
 No
 No
 No
 No
 No
 No
 Yes
 No
 Yes (available in 2021)
 No
Common Criteria certification No No  No  No  No  No  Yes  Yes  No No 

*See individual Cortex-M product pages for further information.

SP = Single Precision

DP = Double Precision

HP = Half Precision

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  • Cortex-M Resources

    List of useful links and resources for developers designing with Cortex-M processors.

    Read here
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  • Designing a SoC with Cortex-M

    Read this white paper to learn how to design a system-on-chip with Cortex-M processors.

    Read here