Cortex-M23

The Cortex-M23 processor is the smallest and most energy-efficient implementation of the Armv8-M architecture.

Block Diagram on Cortex-M23.

Getting Started

The Cortex-M23 processor is a very compact, two-stage pipelined processor that supports the Armv8-M baseline instruction set. The Cortex-M23 with TrustZone is the ideal processor for the most constrained embedded applications where security is a key requirement. 

TrustZone for Armv8-M provides hardware-enforced isolation between the trusted and the untrusted resources on the Cortex-M23 device, while maintaining the efficient exception handling and determinism that have been the hallmark of all Cortex-M processors. 

Everything you need to know about TrustZone for Armv8-M is here.

Specifications

Architecture Armv8-M Baseline (Von Neumann)
ISA Support Thumb/Thumb-2 subset
Pipeline Two-stage
TrustZone Optional TrustZone for Armv8-M
Memory Protection Optional Memory Protection Unit (MPU) with up to 16 regions per security state
Interrupts Non-maskable Interrupt (NMI) and up to 240 physical interrupts with 4 priority levels
Wake-up Interrupt Controller Optional for waking up the processor from state retention power gating or when all clocks are stopped
Sleep Modes Integrated WFI and WFE Instructions and Sleep On Exit capability
Sleep & Deep Sleep Signals
Enhanced Instructions Hardware single-cycle (32x32) multiply and fast (32/32) divide option
Debug Optional JTAG or Serial Wire Debug ports, up to 4 Breakpoints and 4 Watchpoints
Trace Optional Micro Trace Buffer (MTB) or Embedded Trace Macrocell (ETM)
Dual Core Lock-Step Support
 Yes

Compare all Cortex-M processors

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Characteristics

Performance efficiency 2.64 CoreMark/MHz* and 0.97 DMIPS/Mhz**.

Arm Cortex-M23 Minimum Configuration (28HPC+, 9-track)
Dynamic Power (µW/MHz)
 2.26
Floorplan Area (mm²)
 0.00371

*IAR ANSI C/C++ Compiler V8.22.1 for Arm 

Compiler options for CoreMark

-Ohs --no_size_constraints

Compiler options for Dhrystone***

-Ohs --no_size_constraints

**Measured running Dhrystone benchmark.

***Abides by all of the ground rules laid out in the Dhrystone documentation.

  • Manual containing technical information.

  • Cortex-M23 Technical Reference Manual

    For system designers, integrators and testers, the Technical Reference Manual (TRM) provides details of the Cortex-M23 processor.

    Read here
  • A program that is running on a desktop.

  • White Paper: Armv8-M Architecture

    Download this White Paper to get a technical overview of the Armv8-M architecture and an introduction to TrustZone security technology.

    Read here
  • A program that is running on a desktop.

  • White Paper: Cortex-M for beginners

    This White Paper compares the features of various Cortex-M processors and describes how to select the right processor for the application.

    Read here
  • a ulink, a board, a desktop.

  • Embedded Development Tools for Cortex-M Series

    Arm and its ecosystem partners provide a wide range of tools for embedded software development on Arm Cortex-M processors.

    Learn more

Cortex-M Comparison Table

Feature  Cortex-M0 Cortex-M0+ Cortex-M1 Cortex-M23 Cortex-M3 Cortex-M4  Cortex-M33 Cortex-M35P  Cortex-M7 
Instruction set architecture  Armv6-M Armv6-M
 Armv6-M
 Armv8-M Baseline 
 Armv7-M Armv7-M
 Armv8-M Mainline
 Armv8-M Mainline
 Armv7-M
Thumb, Thumb-2  Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb, Thumb-2
 Thumb,
Thumb-2
 Thumb,
Thumb-2
 Thumb,
Thumb-2
DMIPS/MHz range*
 0.87-1.27  0.95-1.36  0.8
 0.99  1.25-1.89  1.25-1.95  1.5  1.5  2.14-3.23
CoreMark®/MHz*
 2.33 2.46  1.85
 2.5 3.34 3.42  4.02 4.02 5.01
Pipeline stages
 3  2  3  2  3  3  3  3  6 
Memory Protection Unit (MPU)  No  Yes (option) No  Yes (option)
(2 x) 		 Yes (option)  Yes (option)  Yes (option)
(2 x) 		 Yes (option)
(2 x) 		 Yes (option) 
Maximum MPU regions  0  8  0  16  8  8  16  16  16 
Trace (ETM or MTB)  No  MTB (option)  No  MTB (option) or 
ETMv3 (option) 		 ETMv3 (option)  ETMv3 (option)  MTB (option) and/or
ETMv4 (option) 		 MTB (option) and/or
ETMv4 (option)  		ETMv4 (option)
DSP  No  No  No  No  No Yes  Yes (option) Yes (option)  Yes 
Floating point hardware  No No  No  No  No Yes (option SP) Yes (option SP)  Yes (option SP)  Yes
(option SP + DP) 
Systick Timer
 Yes (option)  Yes (option)  Yes (option)  Yes (2 x)  Yes Yes Yes (2 x) Yes (2 x) Yes
Built-in Caches  No No No  No No No No  Yes (option 2- 16kB Yes (option 4-64kB 
 I-cache I-cache, D -cache) 
Tightly Coupled Memory  No  No  Yes  No  No  No  No  No  Yes
(option 0-16MB
I-TCM/D-TCM) 
TrustZone for Armv8-M
 No No No Yes (option)  No  No  Yes (option) Yes (option)  No 
Co-processor interface  No  No  No  No  No  No  Yes (option)  Yes (option)  No 
Bus protocol
 AHB Lite  AHB Lite, Fast I/O  AHB Lite  AHB5, Fast I/O  AHB Lite, APB   AHB Lite, APB  AHB5  AHB5 AXI4, AHB Lite, APB, TCM
Wake-up interrupt controller support
 Yes Yes  No  Yes  Yes  Yes  Yes  Yes  Yes 
Integrated interrupt controller
 Yes  Yes  Yes  Yes  Yes  Yes  Yes Yes  Yes 
Maximum # external interrupts
 32  32  32  240  240  240  480 480 240  
Hardware divide  No No  No  Yes  Yes  Yes  Yes  Yes Yes 
Single cycle multiply
 Yes (option) Yes (option)  No  Yes  Yes  Yes  Yes  Yes  Yes 
CMSIS Support
 Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes 
Dual Core Lock-Step Support
 Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes  Yes 

 *See individual Cortex-M product pages for further information.

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the Cortex-M23 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Related IP

The Cortex-M23 processor can be incorporated into a SoC using a broad range of Arm technology including System IP and Physical IP. It is fully supported by Arm development tools. Related IP includes:

Compatible IP
 Tools
 Software

AMBA System Controllers

CoreLink SIE-200

TrustZone CryptoCell-312

Arm CoreLink CG092

AHB flash cache

Physical IP

DS-5 Development Studio

Arm Keil MDK software development tool

Arm Compiler

Cortex-M Prototyping System

Fast Models

TrustZone for Armv8-M

Cortex Microcontroller Software Interface Standard

Arm Mbed Pelion Device Platform

Community Blogs

Blog post image
Enhancing embedded device security with new TrustZone-enabled microcontroll

The introduction of Nuvoton’s M2351 microcontroller, including the Arm Cortex-M23 processor brings a new level of trust and security to embedded systems.

10 months ago by Kobus Marneweck
1
Blog post image
Microchip 发布首款基于 Arm Cortex-M23 的芯片，引领IoT 设备安全性再上新台阶

试想一下，未来全球将有 1 万亿台联网设备，遍布于汽车、住宅、医院、工作场所、街道，几乎随处可见。如何确保体积小巧的低功耗设备可以验证用户身份，如何确保用户个人信息是被加密处理的，又如何确保电池续航时间足以保证设备安全有效地执行所有功能？ 只有半导体、系统和软件公司采用更安全的技术，市场上才会出现更安全的设备。Microchip 宣布推出第一个基于 Arm Cortex-M23 处理器的芯片系列：SAM L11 和 SAM L10，其中 SAM L11 基于Armv8-M的TrustZone技术

1 years ago by Song Bin 宋斌
Blog post image
Microchip release first Arm Cortex-M23 based chip bringing new levels of…

Microchip unveiled two MCU families, the SAM L11 with TrustZone for Armv8-M, for applications requiring embedded security, and SAM L10 for low-power and touch capabilities.

1 years ago by Kobus Marneweck
Blog post image
Get ready for the IoT race with the new system design kit

Picking the right solution for your next SoC, requires combining lots of different elements together. In order to make this process a little easier, Arm created the Arm Corstone Foundation IP and they are designed to be a complete toolbox for…

1 years ago by Mike EFTIMAKIS
Blog post image
Webinar Q&A - Securing your IoT device with Arm TrustZone for Cortex-M

Securing embedded systems has become a critical task for developers. It is nearly impossible to turn on the news and not hear about yet another major security breach.

1 years ago by Phil Burr
Blog post image
Embedded World Conference 2017 - Software Development in ARMv8-M Architectu

2 years ago by Joseph Yiu
2

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Not answered Can i change SP at run time in CM33? Started 5 hours ago by Deepak 0 replies 17 views
Not answered Audio mixing efficiently and hard realtime requirment Started 15 hours ago by Manojkumar Subramaniam 0 replies 45 views
Not answered Are there any Cortex-M controller with h.264 encoder? Started yesterday by Vick 0 replies 58 views
Answered 32-bit encoding hex values for Arm instructions Latest yesterday by BQL 3 replies 262 views
Suggested answer Monitor Mode Debug Latest yesterday by 42Bastian Schick 5 replies 493 views
Suggested answer Memory Protection Unit - Complexity in usage Latest 2 days ago by 42Bastian Schick 5 replies 433 views