- SystemC Cycle Models User Guide Version 11.0
- Cortex-M23 Software Developers Errata Notice
- ARM Cortex-M23 Processor Technical Reference Manual
- Arm Cortex-M23 Devices Generic User Guide
- Difference of behavior between various Cortex-M processors around event registering when in SLEEP mode
- Why does my Cortex-M processor Lock Up with a Hard Fault a few cycles after reset?
- Unable to program the Data Watchpoint Unit / Data Watchpoint and Trace Unit (DWT)
- Late-arriving interrupt behavior
- What are STCALIB and STCLKEN or STCLK, and how should I connect them in the SoC?
- Tarmac trace of AMBA 5 AHB bus accesses from Cortex-M23 and Cortex-M33
- Arm Cortex-M System Design Kit Technical Reference Manual
- ARM CoreLink SDK-100 System Design Kit Technical Overview Revision r0p0
- Cortex-M23 Cycle Model User Guide
- How is a single core reset in a multi-core system?
- Security of Bus Accesses
- ARMv8-M Exception Priority Scheme and the Security Extension
For additional information search for Cortex-M23.