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Answered Inner/Outer Cacheability in Cortex V8-R 0 votes 4992 views 4 replies Latest a month ago by XNoOp Answer this
Answered TCM interface timing of Arm Cortex-r4f 0 votes 1298 views 11 replies Latest 1 months ago by Aaliyah Answer this
Answered Cortex-R4 PMU CP15 cycle counter value : runto readout vs step by step to readout.. 0 votes 602 views 4 replies Latest 1 months ago by d.ry Answer this
Answered ATCM ECC error causes prefetch abort despite ECC check being disabled.
  • Armv7 Exception Model
  • Cortex-R4
0 votes 3964 views 4 replies Latest 3 months ago by Alex21 Answer this
Answered Application note on R4 and R5 differences
  • Cortex-R
  • Cortex-R5
  • Cortex-R4
0 votes 6940 views 7 replies Latest 3 months ago by EllieC Answer this
Answered Is Advanced-SIMD supported in Cortex-R5F?
  • Cortex-R
  • Cortex-R5
  • Armv7-R
  • SIMD and Vector Execution
0 votes 7065 views 5 replies Latest 5 months ago by Zenon Xiu (修志龙) Answer this
Answered Inner/Outer Cacheability in Cortex V8-R Latest a month ago by XNoOp 4 replies 4992 views
Answered TCM interface timing of Arm Cortex-r4f Latest 1 months ago by Aaliyah 11 replies 1298 views
Answered Cortex-R4 PMU CP15 cycle counter value : runto readout vs step by step to readout.. Latest 1 months ago by d.ry 4 replies 602 views
Answered ATCM ECC error causes prefetch abort despite ECC check being disabled. Latest 3 months ago by Alex21 4 replies 3964 views
Answered Application note on R4 and R5 differences Latest 3 months ago by EllieC 7 replies 6940 views
Answered Is Advanced-SIMD supported in Cortex-R5F? Latest 5 months ago by Zenon Xiu (修志龙) 5 replies 7065 views