Arm NN

Software Developer Kit (SDK)

Arm NN is an inference engine for CPUs, GPUs and NPUs. It bridges the gap between existing NN frameworks and the underlying IP. It enables efficient translation of existing neural network frameworks, such as TensorFlow and Caffe, allowing them to run efficiently, without modification, across Arm Cortex-A CPUs, Arm Mali GPUs and Arm Ethos NPUs.

Arm NN is free of charge.

Download Arm NN SDK

About Arm NN SDK

Arm NN SDK is a set of open-source Linux software and tools that enables machine learning workloads on power-efficient devices. It provides a bridge between existing neural network frameworks and power-efficient Cortex-A CPUs, Arm Mali GPUs and Arm Ethos NPUs.

Arm NN SDK utilizes the Compute Library to target programmable cores, such as Cortex-A CPUs and Mali GPUs, as efficiently as possible. Arm NN does not provide support for Cortex-M CPUs.

The latest release supports Caffe, TensorFlow, TensorFlow Lite, and ONNX. Arm NN takes networks from these frameworks, translates them to the internal Arm NN format and then, through the Compute Library, deploys them efficiently on Cortex-A CPUs, and, if present, Mali GPUs such as the Mali-G71 and Mali-G72.

In September 2018, Arm donated Arm NN to the Linaro Machine Intelligence Initiative, where it is now developed fully in open source. To find out more, visit mlplatform.org.

 

 

Neural Network SDK Diagram.
Neural Network Diagram for Android.

Arm NN for Android

Also available is Arm NN for NNAPI, Google’s interface for accelerating neural networks on Android devices, made available in Android O. By default, NNAPI runs neural network workloads on the device’s CPU cores, but also provides a Hardware Abstraction Layer (HAL) that can target other processor types, such as GPUs. Arm NN for Android NNAPI provides this HAL for Mali GPUs. A further release adds support for Arm Ethos-N NPUs. 

Arm support for Android NNAPI gives >4x performance boost.

Learn more

Download Arm NN for Android sources. 

Download here

Arm NN performance relative to other NN frameworks

  • Arm NN open-source collaboration enables optimal third-party implementations
  • Deployed in multiple production devices (>250Mu)

Support for Cortex-M CPUs

Machine learning support for Cortex-M microcontrollers is provided by TensorFlow Lite Micro. Further optimization is available via CMSIS-NN, a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of neural networks on Cortex-M processor cores.

Download CMSIS-NN

Arm NN future roadmap

Future releases of Arm NN will enable support for other machine learning frameworks as inputs, and other forms of processor cores as targets. This includes processor cores and accelerators from Arm’s partners, assuming availability of suitable extensions.

Information on the Machine Learning Platform.

Webinar - Project Trillium: Optimizing ML Performance for any Application

Project Trillium is a suite of Arm IP designed to deliver scalable ML and neural network functionality at any point on the performance curve, from sensors, to mobile, and beyond. 

 

Find out more

Community Forums

Suggested answer Which bit fields are for Cortex-M4F SCB_ICSR.VECTORPENDING
  • Cortex-M4
0 votes 92 views 1 replies Latest yesterday by 42Bastian Schick Answer this
Suggested answer Tasks can't switch to others, always run at OSStartHang. but whitout boot code ,the app can run ok. the core of the chip is cortex-M0 0 votes 2856 views 7 replies Latest 2 days ago by John_shi Answer this
Not answered SVCall returning to 0xdeadbeee
  • Cortex-M7
  • 11 (SVCall)
0 votes 165 views 0 replies Started 3 days ago by DanS Answer this
Not answered How to test L1/L2 cache? 0 votes 346 views 0 replies Started 3 days ago by Zhiping Jiang Answer this
Not answered V2C-DAPLINK-035A shield schematic
  • FPGA
  • Debug Adapters
0 votes 52 views 0 replies Started 3 days ago by Brix Answer this
Answered Speculative execution/loads on Cortex-A5
  • Cortex-A5
  • Pipeline Control and Execution
  • Cache
0 votes 1526 views 5 replies Latest 3 days ago by vstehle Answer this
Suggested answer Which bit fields are for Cortex-M4F SCB_ICSR.VECTORPENDING Latest yesterday by 42Bastian Schick 1 replies 92 views
Suggested answer Tasks can't switch to others, always run at OSStartHang. but whitout boot code ,the app can run ok. the core of the chip is cortex-M0 Latest 2 days ago by John_shi 7 replies 2856 views
Not answered SVCall returning to 0xdeadbeee Started 3 days ago by DanS 0 replies 165 views
Not answered How to test L1/L2 cache? Started 3 days ago by Zhiping Jiang 0 replies 346 views
Not answered V2C-DAPLINK-035A shield schematic Started 3 days ago by Brix 0 replies 52 views
Answered Speculative execution/loads on Cortex-A5 Latest 3 days ago by vstehle 5 replies 1526 views