Neoverse E1

The Neoverse E1 processor is a new class of highly efficient CPU designed specifically for throughput compute workloads.

Neoverse E1 block diagram

Getting started

The Arm Neoverse E1 CPU delivers best in class throughput efficiency. It incorporates a new simultaneous multithreading (SMT) microarchitecture design. With SMT, the processor can execute two threads concurrently resulting in better aggregate throughput performance.

The Neoverse E1 delivers 2.1x more compute performance, 2.7x more throughput performance and 2.4x better throughput efficiency compared to the Cortex-A53. The design is highly scalable to support throughput demands for next generation edge to core data transport.


Specifications

General Architecture Armv8-A (Harvard)
Extensions
  • Armv8.1 extensions
  • Armv8.2 extensions
  • Advanced SIMD and floating-point
  • Cryptography extensions
  • RAS extensions
  • Armv8.3 LDAPR instructions
  • Armv8.4 Dot Product support instructions
  • Armv8.5 PSTATE SSBS bit
  ISA support A64
Microarchitecture Pipeline Out-of-order
Superscalar Yes
Neon and Floating Point Unit Included
Cryptography Unit Optional
Max number of CPUs in cluster Eight (8)
  Physical addressing (PA) 44-bit
Memory system and external interfaces L1 I-Cache and D-Cache 32KB to 64KB
  L2 Cache Optional, 64KB to 256KB
  L3 Cache Optional, 512KB to 4MB
  ECC Support Yes
  Bus interfaces AMBA ACE or CHI
  ACP Optional
  Peripheral Port Optional
Other Functional Safety Support Safety package
Security TrustZone
  Interrupts GIC interface, GICv4
  Generic timer Armv8-A
  PMU PMUv3
  Debug Armv8-A (plus Armv8.2-A extensions)
  CoreSight CoreSightv3
  Embedded Trace Macrocell ETMv4.2 (instruction trace)

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Answered Keil uVision compiling with API Issues
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Answered TTBR1_EL2 mmu translation information wrong when E2H=1 0 votes 819 views 4 replies Latest 17 hours ago by lemin9538 Answer this
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Answered What happens to the Instructions already in pipeline when interrupt occurs ?
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Answered File 'pthread.h' not included in keil 0 votes 267 views 4 replies Latest 3 days ago by MHansra Answer this
Answered Keil uVision compiling with API Issues Latest 8 hours ago by KevinM 3 replies 69 views
Answered TTBR1_EL2 mmu translation information wrong when E2H=1 Latest 17 hours ago by lemin9538 4 replies 819 views
Answered Breakpoints not working in C code, only in assembly? Latest 18 hours ago by Danijel 7 replies 563 views
Answered What happens to the Instructions already in pipeline when interrupt occurs ? Latest yesterday by 42Bastian Schick 6 replies 315 views
Answered Fault Injection in ROM. Latest 2 days ago by Broeker 6 replies 444 views
Answered File 'pthread.h' not included in keil Latest 3 days ago by MHansra 4 replies 267 views