SecurCore SC000

The Arm SecurCore SC000 processor is designed specifically for the highest-volume smartcard and embedded security applications. 

Getting Started

The SC000 combines the low power and low area from the Cortex-M0 processor with the proven security features of Arm SecurCore processors. This enables a high assurance level certification for security-critical applications. Arm SecurCore processors are the most widely licensed 32-bit processors for smartcards worldwide. The programmers’ model is the same as the Cortex-M0. Therefore, the Cortex-M0 documentation listed below can be used for software development. However, explanation of anti-tampering features requires a SecurCore NDA.


Characteristics

Performance efficiency: 2.33 CoreMark/MHz* and 0.87/1.02/1.27 DMIPS/MHz**

   180ULL
(7-track, min 1.8v, 25°C)
 90LP
(7-track, min 1.2v, 25°C)
 40LP
(9-track, min 1.1v, 25°C)
 Dynamic Power
74 µW/MHz 11.2 µW/MHz 4.6µW/MHz
 Floorplan area
0.125 mm2
0.034 mm2 0.008 mm2

** The first result abides by all of the ‘ground rules’ laid out in the Dhrystone documentation. The second result permits inlining of functions, not just the permitted C string libraries. The third result also permits simultaneous (multi-file) compilation. All are with the original (K&R) v2.1 of Dhrystone.

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the SC000 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Open a support case

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Suggested answer Patent of ARM's single-cycle multiply on the M0+? 0 votes 271 views 6 replies Latest yesterday by Sean Dunlevy Answer this
Suggested answer Are 128 bits atomic accesses possible with Cortex-A35?
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0 votes 395 views 2 replies Latest yesterday by Etienne Alepins Answer this
Answered Forum FAQs Started 2 months ago by Annie Cracknell 0 replies 259 views
Answered Forum FAQs Started 2 months ago by Annie Cracknell 0 replies 260 views
Answered Forum FAQs Started 2 months ago by Annie Cracknell 0 replies 5986 views
Answered Forum FAQs Started 2 months ago by Annie Cracknell 0 replies 238 views
Suggested answer Patent of ARM's single-cycle multiply on the M0+? Latest yesterday by Sean Dunlevy 6 replies 271 views
Suggested answer Are 128 bits atomic accesses possible with Cortex-A35? Latest yesterday by Etienne Alepins 2 replies 395 views