Arm SecurCore SC300

The Arm SecurCore SC300 processor is designed specifically for high-performance smartcard and embedded security applications. 

Block Diagram on SecurCore SC300.

Getting Started

The SC300 combines the benefits of the industry standard Cortex-M3 processor with the proven security features of Arm SecurCore processors. This enables a high assurance level certification for security-critical applications. Arm SecurCore processors are the most widely licensed 32-bit processors for smartcards worldwide. The programmers’ model is the same as the Cortex-M3. Therefore, the Cortex-M3 documentation listed below can be used for software development. However, explanation of anti-tampering features requires a SecurCore NDA.


Characteristics

Performance efficiency: 3.34 CoreMark/MHz* and 1.25/1.50/1.89 DMIPS/MHz**

   180ULL
(7-track, min 1.8v, 25°C)
 90LP
(7-track, min 1.2v, 25°C)
 40LP
(9-track, min 1.1v, 25°C)
 Dynamic Power

 162 µW/MHz

37 µW/MHz 13 µW/MHz 
 Floorplan area
0.40 mm2
 0.10 mm2  0.028 mm2

** The first result abides by all of the ‘ground rules’ laid out in the Dhrystone documentation. The second result permits inlining of functions, not just the permitted C string libraries. The third result also permits simultaneous (multi-file) compilation. All are with the original (K&R) v2.1 of Dhrystone.

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the SC300 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Community Blogs

Community Forums

Not answered How to stop coresight sink on CPU exception 0 votes 3 views 0 replies Started 5 hours ago by Sudipta Answer this
Suggested answer ARMv8 memory ordering
  • Cortex-A53
  • Armv8-A
0 votes 1007 views 5 replies Latest 6 hours ago by 42Bastian Schick Answer this
Suggested answer How does ARM11 respond to a non-secure interrupt in secure mode?
  • Arm11
  • Interrupt
0 votes 1517 views 3 replies Latest 9 hours ago by morghan Answer this
Suggested answer Unable to Download Code to Controller
  • 5 (BusFault)
  • 3 (HardFault)
  • 6 (UsageFault)
  • Cortex-M4
0 votes 413 views 8 replies Latest yesterday by ShivasWorld Answer this
Suggested answer Character recognition using NXP LPC1768 (Cortex-M3)
  • Neural Network
  • Cortex-M3
  • Arm NN
0 votes 386 views 4 replies Latest yesterday by 42Bastian Schick Answer this
Suggested answer Calling non-secure Reset Handler from Secure main
  • Cortex-M33
  • Armv8-M
0 votes 314 views 1 replies Latest yesterday by Radhika Raghavendran Answer this
Not answered How to stop coresight sink on CPU exception Started 5 hours ago by Sudipta 0 replies 3 views
Suggested answer ARMv8 memory ordering Latest 6 hours ago by 42Bastian Schick 5 replies 1007 views
Suggested answer How does ARM11 respond to a non-secure interrupt in secure mode? Latest 9 hours ago by morghan 3 replies 1517 views
Suggested answer Unable to Download Code to Controller Latest yesterday by ShivasWorld 8 replies 413 views
Suggested answer Character recognition using NXP LPC1768 (Cortex-M3) Latest yesterday by 42Bastian Schick 4 replies 386 views
Suggested answer Calling non-secure Reset Handler from Secure main Latest yesterday by Radhika Raghavendran 1 replies 314 views