Arm SecurCore SC300

The Arm SecurCore SC300 processor is designed specifically for high-performance smartcard and embedded security applications. 

Block Diagram on SecurCore SC300.

Getting Started

The SC300 combines the benefits of the industry standard Cortex-M3 processor with the proven security features of Arm SecurCore processors. This enables a high assurance level certification for security-critical applications. Arm SecurCore processors are the most widely licensed 32-bit processors for smartcards worldwide. The programmers’ model is the same as the Cortex-M3. Therefore, the Cortex-M3 documentation listed below can be used for software development. However, explanation of anti-tampering features requires a SecurCore NDA.

Characteristics

Performance efficiency: 3.34 CoreMark/MHz* and 1.25/1.50/1.89 DMIPS/MHz**

   180ULL
(7-track, min 1.8v, 25°C)		  90LP
(7-track, min 1.2v, 25°C)		  40LP
(9-track, min 1.1v, 25°C)
 Dynamic Power

 162 µW/MHz

 37 µW/MHz 13 µW/MHz 
 Floorplan area
 0.40 mm2
  0.10 mm2  0.028 mm2

** The first result abides by all of the ‘ground rules’ laid out in the Dhrystone documentation. The second result permits inlining of functions, not just the permitted C string libraries. The third result also permits simultaneous (multi-file) compilation. All are with the original (K&R) v2.1 of Dhrystone.

Get Support

Arm Support

Arm training courses and on-site system-design advisory services enable licensees to efficiently integrate the SC300 processor into their design to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Arm Design Reviews  Open a support case

Community Forums

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Suggested answer Longer pipelines on Cortex R's vs real-time & performance 0 votes 95 views 2 replies Latest 7 hours ago by d.ry Answer this
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Answered Forum FAQs Started 4 months ago by Annie 0 replies 628 views
Answered Forum FAQs Started 4 months ago by Annie 0 replies 672 views
Answered Forum FAQs Started 4 months ago by Annie 0 replies 6365 views
Answered Forum FAQs Started 4 months ago by Annie 0 replies 631 views
Suggested answer Longer pipelines on Cortex R's vs real-time & performance Latest 7 hours ago by d.ry 2 replies 95 views
Suggested answer Cortex-M3 DA addressing not allowed for STM Latest 13 hours ago by sung145 2 replies 70 views