TrustZone technology for Armv8-M

The Armv8-M architecture extends TrustZone technology to Cortex-M based systems, enabling robust levels of protection at all cost points. TrustZone reduces the potential for attack by isolating the critical security firmware and private information, such as secure boot, firmware update, and keys, from the rest of the application.

TrustZone technology offers an efficient, system-wide approach to security with hardware-enforced isolation built into the CPU. It does this by running two domains side-by-side and sharing resources per set configuration.

Diagram showing Arm TrustZone secure and non-secure

Webinars

A guide to securing your IoT device using TrustZone for Cortex-M

Examine concepts like Secure and Non-secure domains, setting up a TrustZone RTOS, and debugging a secure application.

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Getting started with TrustZone for Cortex-M

Develop a secure application starting with architecture design and isolation and ending with implementation. Watch a demo using the Microchip SAML11 TrustZone-enabled microcontroller.

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IoT security for software developers: how PSA can help...

Secure your IoT products with Platform Security Architecture (PSA) APIs, TrustZone technology and Trusted Firmware-M.

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The Platform Security Architecture APIs

Learn to design IoT devices and use the PSA Functional APIs to build a secure product.

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Achieving a secure execution environment on NXP TrustZone-enabled MCUs

Implement a secure execution environment for microcontrollers. Learn how to maintain real-time and low-power properties of the system using NXP’s LPC5500 MCU series.

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Using the TrustZone-enabled NuMicro M2351 and CMSIS-Zone

Develop secure IoT applications on the Nuvoton NuMicro M2351. Learn how to apply the approach on real target hardware, using CMSIS-Zone for setting up the Secure and Non-secure partitions.

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Working with TrustZone in a secure IAR Systems workflow

Set up a secure development workflow using IAR Embedded Workbench and IAR Systems C-Trust tool. Use IAR Embedded Workbench to create reliable, efficient TrustZone-based applications.

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Secure IoT with Microchip and Kinibi-M

Use the Trustonic Kinibi-M to program a MicroChip SAML11 microcontroller, based on the Arm Cortex-M33 processor with TrustZone technology. Generate secure messages that a server or cloud can validate from a device for decryption and display.

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Documentation

Software developers guide to IoT security

Learn key concepts for developing secure IoT applications including analyzing a system, creating and implementing secure software, and certifying that a system is secure.

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TrustZone technology for the Armv8-M architecture

Learn about the Security states, memory partitions, switching between states, and calling of Secure functions.

Using TrustZone on Armv8-M

Learn about the features in CMSIS and Keil MDK,so that you can use the Secure and Non-secure domains in the Armv8-M architecture.

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The Armv8-M architecture reference manual

Examine the microcontroller profile of the Armv8-M architecture.

Fault handling and detection

Learn about how to detect and manage faults in Armv8-M processors.

Secure software guidelines for Armv8‑M based platforms

Examine the requirements for creating secure software on an Armv8‑M-based platform.

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Armv8‑M processor debug

Learn how to handle the various debug event sources on the Armv8-M architecture.

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Armv8‑M exception handling

Examine how the processor responds to an exception, the properties associated with each exception, and the return behavior.

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RTOS design considerations for Armv8‑M based platforms

Learn about the processor features that have been extended in the Armv8-M architecture that can affect RTOS design.

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System design for Armv8‑M

Examine a system design with the extra components and logic that are required to support an Armv8‑M-based microcontroller.

ACLE extensions for Armv8‑M

Learn about the Arm C Language Extensions (ACLE) for the Armv8-M architecture and how they build a Secure image.

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Armv8-M processor power management secure state protection

Learn about the interaction between processor power management and security implications.

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Training

TrustZone forArmv8-M

Learn about the security features in the Armv8-M architecture and understand how to configure the Security Attribution Unit to set up Secure and Non-secure memory regions.

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TrustZone for Armv8-M secure system design

Examine the architectural features that underpin the security partitioning at a software level and how security can be implemented in the wider system using AMBA ABH5.

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Software and tools

Mbed OS

Mbed OS is a leading open-source RTOS for Arm processors. Use Mbed OS to develop IoT software, generate optimized code with Arm C/C++ Compiler and run code on hundreds of hardware platforms.

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CMSIS-Pack

A CMSIS-Pack is a software pack that includes source, header, and library files, and documentation, source code templates, and example projects. The pack enables proactive software deployment for specific MCU devices.

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Trusted Firmware-M

Trusted Firmware-M provides open-source reference documents, specifications, and APIs of PSA-trusted code for Armv8-M based microcontrollers to help you build secure devices.

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Keil MDK

Keil MDK includes the components that you need to build and debug Arm-based embedded applications, including Arm Compiler, IDE, debugger, RTOS, and middleware.

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TrustZone-enabled microcontrollers

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Community Forums

Suggested answer Switching from 32bit to 64bit 0 votes 3108 views 2 replies Latest 1 months ago by Zenon Xiu (修志龙) Answer this
Answered Cortex-M33 - SVC call from non-secure code does not trigger non-secure SVC exception
  • Real Time Operating Systems (RTOS)
  • Trusted Firmware-M
  • TrustZone for Armv8-M
  • Armv8-M
0 votes 1295 views 3 replies Latest 2 months ago by Michael Jung Answer this
Answered The Monitor
  • TrustZone
0 votes 6010 views 4 replies Latest 2 months ago by yufeifei Answer this
Not answered Are the IDAU NS and NSC signals assumed to be mutually exclusive? 0 votes 676 views 0 replies Started 2 months ago by kappajacko Answer this
Discussion SAU vs. IDAU in a System with Multiple Masters
  • Security
  • TrustZone
  • Armv8-M
0 votes 11528 views 5 replies Latest 3 months ago by Chris Reed Answer this
Suggested answer Arm Musca A1 - SRAM0 MPC Security attribute during boot
  • Musca-A
  • TrustZone for Armv8-M
  • CoreLink SSE-200
0 votes 3174 views 2 replies Latest 3 months ago by Daniel Oliveira Answer this
Suggested answer Switching from 32bit to 64bit Latest 1 months ago by Zenon Xiu (修志龙) 2 replies 3108 views
Answered Cortex-M33 - SVC call from non-secure code does not trigger non-secure SVC exception Latest 2 months ago by Michael Jung 3 replies 1295 views
Answered The Monitor Latest 2 months ago by yufeifei 4 replies 6010 views
Not answered Are the IDAU NS and NSC signals assumed to be mutually exclusive? Started 2 months ago by kappajacko 0 replies 676 views
Discussion SAU vs. IDAU in a System with Multiple Masters Latest 3 months ago by Chris Reed 5 replies 11528 views
Suggested answer Arm Musca A1 - SRAM0 MPC Security attribute during boot Latest 3 months ago by Daniel Oliveira 2 replies 3174 views