Arm Corstone

Build a Secure IoT System on Chip

Arm Corstone provides everything you need to start your SoC design, helping you build SoCs faster and more securely, with the right architecture choice, integration and verification.

At the heart of a Corstone reference package is one of the Arm subsystems - an implementation of an Arm-defined subsystem architecture. The Corstone reference package is a complete solution for architecting the system, making it secure, and able to handle the complex power-control infrastructure, while balancing trade-offs between performance and power.

Corstone block diagram

  • Arm has integrated the processor(s), system IP, memory system, debug, security IP and other Arm IP together, simplifying the design process and handling the power control, security and performance in an optimised way.
  • Hundreds of hours of verification work has been dedicated to these subsystems, allowing you to benefit from getting to market quickly.
  • Each subsystem is configurable, modifiable, enabling you to focus on differentiation by customizing the system to meet your unique needs.
  • Corstone has been designed to be extensible so you can build the rest of your SoC on top of the system.
  • Simplify software development with easier porting of open-source Trusted Firmware-M (TF-M) for an accelerated route to PSA Certified.
  • Design confidently with FPGA and Fixed Virtual Prototyping (FVP) platforms based on Corstone. Choose from well supported RTOSs such as as RTX, FreeRTOS, Zephyr and Mbed OS to further reduce software development cost.

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Explore the Corstone packages available for your SoC design.

Component Corstone-101
Corstone-102
Corstone-201
Corstone-300 Corstone-500 Corstone-700
Corstone subsystems
SSE-050 Subsystem (Cortex-M3 based)
Yes
Yes  Yes      Yes 
SSE-123 Subsystem (Cortex-M23 based)   Yes
Yes
    Yes
SSE-200 Subsystem (dual Cortex-M33 based)
    Yes
    Yes
SSE-300 Subsystem (Cortex-M55 based)
      Yes
   
SSE-500 Subsystem (Cortex-A5 based)
        Yes
 
SSE-700 Subsystem (Cortex-A32 and Cortex-M based)
          Yes
System IP
CM0SDK and CMSDK (common IP blocks)
Yes
Yes
Yes  Yes
Yes
Yes 
True Random Number Generator (TRNG) Real-Time Clock (RTC) Yes
Yes  Yes  Yes
Yes
Yes 
CoreLink AHB Flash Cache
Yes
Yes  Yes  Yes
  Yes 
CoreLink SIE-200 (AHB5 TrustZone System IP)
  Yes  Yes
Yes
  Yes
CoreLink GFC-100 Flash Controller (single port)
Yes  Yes  Yes
Yes
  Yes
CoreLink GFC-200 Flash Controller (dual port)
  Yes
Yes
Yes
  Yes
CoreLink PCK-600 (power control)
  Yes
Yes
Yes
  Yes
CoreLink SDC-600 (authenticated debug)
    Yes
    Yes 
CoreLink LPD-500 (power control)
 
Yes
    Yes
CoreSight SoC-400M (standard debug)
    Yes
   
CorSight SoC-400 (standard debug)
        Yes
 
CoreSight SoC-600 (enhanced debug)
   
    Yes
XHB-500 (AHB5 and AXI bridging IP)
      Yes
  Yes 
CoreLink SIE-300 (AXI5 TrustZone System IP)
      Yes
 
CoreLink NIC-400         Yes
 
CoreLink NIC-400-Lite
      Yes
   
CoreLink ADB-400
      Yes
   
NIC-450 (network interconnect)
          Yes
CoreSight STM-500 System Trace Macro
          Yes
IntMemAxi (Internal memory interface)
        Yes
Yes
UART
        Yes
Yes

Corstone-101

Cortex-M0/M0+/M3/M4

A reference package based on Cortex-M3 and all the fundamental system elements to design an SoC with Cortex-M0, Cortex-M0+, and Cortex-M4 processors.

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Corstone-102

Cortex-M23

Combines all the necessary hardware elements for an SoC design based on the Arm Cortex-M23 processor.


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Corstone-201

Cortex-M33

Combines all the necessary hardware elements for an SoC design based on the Arm Cortex-M33 processor.


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Corstone-300

Cortex-M55

Provides the fastest way to incorporate the AI-capable Cortex-M55 into an SoC design.



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Corstone-500

Cortex-A5

A reference package to build a high-performance Linux-capable SoC based on the Cortex-A5 processor.


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Corstone-700

Cortex-A and Cortex-M

Integrates both Cortex-M and Cortex-A processors in one handy, flexible subsystem. It includes support for system peripherals, plus a broad spectrum of security counter-measures.

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Contact us

Are you looking to grow your IoT portfolio quickly and with minimal risk? Find out how to license processor and Corstone IP through Arm Flexible Access.

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Get support

Arm support

Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.

Arm training courses  Open a support case

Community Forums

Answered What is the correct data in BUSY state? 0 votes 1126 views 10 replies Latest 10 days ago by Colin Campbell Answer this
Answered D-Cache read problem in EL2 mode ARM V8
  • EL2
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0 votes 8060 views 7 replies Latest 22 days ago by gz-gz Answer this
Answered Burst termination with BUSY on AHB Lite
  • AHB-Lite
0 votes 529 views 2 replies Latest 24 days ago by Lumi Yang Answer this
Answered Embedded Linux online course 0 votes 1338 views 4 replies Latest 1 months ago by Osama Answer this
Answered NIC-400 Clock Relations questions in Socrates 0 votes 598 views 1 replies Latest 1 months ago by Colin Campbell Answer this
Answered New member 0 votes 1721 views 11 replies Latest 2 months ago by Andy Neil Answer this
Answered What is the correct data in BUSY state? Latest 10 days ago by Colin Campbell 10 replies 1126 views
Answered D-Cache read problem in EL2 mode ARM V8 Latest 22 days ago by gz-gz 7 replies 8060 views
Answered Burst termination with BUSY on AHB Lite Latest 24 days ago by Lumi Yang 2 replies 529 views
Answered Embedded Linux online course Latest 1 months ago by Osama 4 replies 1338 views
Answered NIC-400 Clock Relations questions in Socrates Latest 1 months ago by Colin Campbell 1 replies 598 views
Answered New member Latest 2 months ago by Andy Neil 11 replies 1721 views