The Arm CoreLink CCI-400 Cache Coherent Interconnect provides full cache coherency between two clusters of multi-core CPUs. It enables big.LITTLE processing and I/O coherency for devices such as the Mali-T600 series GPU, and I/O masters like modem and USB. First released in 2011, CoreLink CCI-400 has been widely licensed and is today shipping in many millions of production devices.
CoreLink CPE-425 Coherent PCIe Extension for CCI-400
The Arm CPE-425 Coherent PCIe Extension for Corelink CCI-400 is a companion product available through Flexible Access. A small overview of the extension:
- A companion product for Corelink CCI-400
- Enables IO Coherent PCIe for Corelink CCI-400
- Allows CPU write backs to flow, removing known deadlocks and terminating barriers
| AMBA Specifications
||AMBA 4 ACE and ACE-Lite|
|ACE Slave interfaces||2 for fully coherent processors including Arm Cortex|
|ACE-Lite slave interfaces||1-3 for IO coherent devices such as Mali processors, accelerators and IO
|Memory and System master interfaces||
1-2 memory interfaces
||Broadcast snoop protocol
|Memory map||40 bit Physical, configurable address map
44 bit DVM
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CoreLink CCI-400 Technical Reference Manual
For system designers, system integrators and programmers who are designing a SoC, the Technical Reference Manual is the go-to resource.CCI-400 TRM
AMBA 4 ACE Specification
CoreLink CCI-400 is built on the AMBA AXI4 specification, targeting high bandwidth, high clock frequency system designs.AMBA specs
Extended System Coherency
A three-part series of blogs on cache coherency fundamentals, and why they matter to system design.
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