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CoreLink CCI-550 TRM
For system designers, system integrators and programmers who are designing a SoC, the TRMl is the go-to resource.
CCI-550 TRM -
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AMBA 4 ACE Specification
CoreLink CCI-550 is built on the AMBA 4 ACE specification, targeting high bandwidth, high clock frequency system designs.
AMBA specs -
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Quality of Service (QoS) in Arm Systems
Nearly all performance-oriented SoCs are dependent on high bandwidth and low latency external memory systems to deliver within cost and performance constraints. This paper goes through the QoS functions that help deliver predictable performance in Arm systems.
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QoS for Performant and Efficient HD Media.
Ensuring the demands of video streaming are consistently met while minimizing cost and maximizing battery life are the challenges for today's SoC designer. This paper explores how QoS mechanisms can enable lower latency while maintaining sufficient overall system bandwidth.
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Extended System Coherency
A three-part series of blogs on cache coherency fundamentals, and why they matter to system design.
Learn more
Community Forums
Answered | Forum FAQs | 0 votes | 2819 views | 0 replies | Started 1 months ago by Annie Cracknell | Answer this |
Answered | Forum FAQs | 0 votes | 2835 views | 0 replies | Started 1 months ago by Annie Cracknell | Answer this |
Not answered | Does it use a Slow Clock to turn off Main Clock? | 0 votes | 32 views | 0 replies | Started yesterday by Ridge Mao | Answer this |
Answered | Can re-order depth affect functionality of write transaction? | 0 votes | 507 views | 5 replies | Latest 2 days ago by Colin Campbell | Answer this |
Suggested answer | Alignment Address Calculation in AHB | 0 votes | 11157 views | 5 replies | Latest 4 days ago by Colin Campbell | Answer this |
Suggested answer | HTRANS when HREADY is low on the 2nd HCLK after starting the transfer | 0 votes | 262 views | 1 replies | Latest 4 days ago by Colin Campbell | Answer this |
Answered | Forum FAQs Started 1 months ago by Annie Cracknell | 0 replies 2819 views |
Answered | Forum FAQs Started 1 months ago by Annie Cracknell | 0 replies 2835 views |
Not answered | Does it use a Slow Clock to turn off Main Clock? Started yesterday by Ridge Mao | 0 replies 32 views |
Answered | Can re-order depth affect functionality of write transaction? Latest 2 days ago by Colin Campbell | 5 replies 507 views |
Suggested answer | Alignment Address Calculation in AHB Latest 4 days ago by Colin Campbell | 5 replies 11157 views |
Suggested answer | HTRANS when HREADY is low on the 2nd HCLK after starting the transfer Latest 4 days ago by Colin Campbell | 1 replies 262 views |