Getting Started

The Arm CoreLink Network Interconnect offers highly configurable topology with Network on Chip (NoC)-like properties that enable you to build high performance, optimized, AMBA-compliant SoC connectivity. CoreLink Network Interconnect is configurable across a wide range of applications from a single bridge component, for example an AHB to AXI protocol bridge, to a complex infrastructure that consists of up to 128 masters and 64 slaves in a combination of different AMBA protocols.

  • CoreLink NIC-450 Network Interconnect Chip.
  • CoreLink NIC-450

    • Library of key interconnect IP that enables designers to build a scalable and configurable network interconnect
    • Available with a new tooling automation flow using CoreLink Creator that employs algorithms to accelerate configuration based on design requirements
    • Enables integrated tooling environment using CoreLink Creator and Socrates DE (licensed separately) for configuring complex interconnect subsystem designs.
    • Includes all NIC-400 features
  • CoreLink NIC-400 Network Interconnect Chip.
  • CoreLink NIC-400

    • Fully configurable, hierarchical, low latency, low power connectivity for AMBA 4 AXI4, AXI3, AHB-Lite and APB interfaces.
    • Scalable for multiple applications from simple single core designs, up to large coherent systems as a companion to CoreLink CCI and CCN coherent interconnects.

    NIC-400 TRM

NIC-450 and CoreLink Creator

CoreLink Creator with its harvesting flows and enhanced tooling environment provides significant improvements to configure NICs, which decreases time to market.

Functional enhancement in NIC-400r1 with QVN-terminate feature to resolve head-of-line blocking when accessing DRAM provide:

  • Improved support for QVN with DMC controllers using sideband QOSACCEPT signaling, supported in DMC-500 and other 3rd party DMC providers.

  • CPU latency reduction with QoS enhancements, designed and tested with Arm memory controllers such as CoreLink DMC-500.

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.

CoreLink ADB-400

The CoreLink ADB-400 AMBA Domain Bridge is an asynchronous bridge between two components or systems that can be in a different power, clock, or voltage domains.

The ADB-400 supports:

  • An optional configurable destination register for the payload of each channel.
  • Simple reset requirements.
  • A power management interface.
  • Dynamic Voltage and Frequency Scaling (DVFS).
  • Quality of Service (QoS) Virtual Network (QVN).
  • Clock status indication.

The ADB-400 consists of a slave domain and a master domain. The slave domain received transfers from the AMBA master and the master domain transmits transfers to an AMBA slave.

CoreLink XHB-400

The XHB converts AXI4 protocol to AHB-Lite protocol and has an AXI4 slave interface and an AHB-Lite master interface. 

AXI4 slave interface: This connects to either the AXI4 master interface of a processor or to an AXI interconnect.

AHB-Lite master interface: This implements an AHB-Lite master to drive AHB-Lite subsystems.

Click to view the XHB-400 TRM

NIC-450 Library of Interconnect IP

Network Interconnect NIC-400
Advanced Quality of Service QoS-400
 Virtual Networks QVN-400
 Thin Links TLX-400
 AMBA Domain Bridge ADB-400
 AXI-to-AHB Bridge XHB-400
 Low-power distributor LPD-500

Resources

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Community Blogs

Community Forums

Not answered Aligned and unaligned word transfers on a 64-bit bus
  • AXI
  • AXI4
0 votes 331 views 0 replies Started 5 days ago by Maria_d Answer this
Suggested answer CMSIS: Storage interface vs Flash interface - what's the difference ?
  • CMSIS
  • CMSIS-NN
0 votes 539 views 1 replies Latest 5 days ago by Vladimir Umek Answer this
Suggested answer What SBCs I need to choose?
  • Raspberry Pi
  • Maker Faire
  • Single Board Computer (SBC)
  • Development Boards
0 votes 522 views 1 replies Latest 6 days ago by Andy Neil Answer this
Not answered Does anyone knows why a documentation as ARM DSU 0030 is only available for licensees 0 votes 450 views 0 replies Started 7 days ago by JaWa Answer this
Suggested answer The meanings of AxCACHE 0 votes 522 views 1 replies Latest 9 days ago by Christopher Tory Answer this
Suggested answer CoreLink NIC-400 Interconnect gives an extra request
  • CoreLink NIC-400 Network Interconnect
0 votes 608 views 1 replies Latest 10 days ago by Christopher Tory Answer this
Not answered Aligned and unaligned word transfers on a 64-bit bus Started 5 days ago by Maria_d 0 replies 331 views
Suggested answer CMSIS: Storage interface vs Flash interface - what's the difference ? Latest 5 days ago by Vladimir Umek 1 replies 539 views
Suggested answer What SBCs I need to choose? Latest 6 days ago by Andy Neil 1 replies 522 views
Not answered Does anyone knows why a documentation as ARM DSU 0030 is only available for licensees Started 7 days ago by JaWa 0 replies 450 views
Suggested answer The meanings of AxCACHE Latest 9 days ago by Christopher Tory 1 replies 522 views
Suggested answer CoreLink NIC-400 Interconnect gives an extra request Latest 10 days ago by Christopher Tory 1 replies 608 views