Getting Started

The Arm CoreLink Network Interconnect (NIC) family offers highly configurable topology with Network on Chip (NoC)-like properties that enable you to build high performance, optimized, AMBA-compliant SoC connectivity. The CoreLink NIC family is configurable across a wide range of applications from a single bridge component, for example an AHB to AXI protocol bridge, to a complex infrastructure that consists of up to 128 masters and 64 slaves in a combination of different AMBA protocols.

  • CoreLink NIC-450 Network Interconnect Chip.
  • CoreLink NIC-450

    • Library of key interconnect IP that enables designers to build a scalable and configurable NIC.
    • Available with a tooling automation flow using CoreLink Creator that employs algorithms to accelerate configuration based on design requirements.
    • Enables integrated tooling Socrates DE (licensed separately) for configuring complex interconnect subsystem designs.
    • Includes all NIC-400 features.
  • CoreLink NIC-400 Network Interconnect Chip.
  • CoreLink NIC-400

    • Fully configurable, hierarchical, low latency, low power connectivity for AMBA 4 AXI4, AXI3, AHB-Lite and APB interfaces.
    • Scalable for multiple applications from simple single core designs, up to large coherent systems as a companion to CoreLink CCI and CCN coherent interconnects.

    NIC-400 TRM

NIC-450 and CoreLink Creator

CoreLink Creator with its harvesting flows and enhanced tooling environment provides significant improvements to configure NICs, which decreases time to market.

Functional enhancement in NIC-400r1 with QVN-terminate feature to resolve head-of-line blocking when accessing DRAM provide:

  • Improved support for QVN with DMC controllers using sideband QOSACCEPT signaling, supported in DMC-500 and other 3rd party DMC providers.
  • CPU latency reduction with QoS enhancements, designed and tested with Arm memory controllers such as CoreLink DMC-500.

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.


CoreLink ADB-400

The CoreLink ADB-400 AMBA Domain Bridge is an asynchronous bridge between two components or systems that can be in a different power, clock, or voltage domains.

The ADB-400 supports:

  • An optional configurable destination register for the payload of each channel.
  • Simple reset requirements.
  • A power management interface.
  • Dynamic Voltage and Frequency Scaling (DVFS).
  • Quality of Service (QoS) Virtual Network (QVN).
  • Clock status indication.

The ADB-400 consists of a slave domain and a master domain. The slave domain received transfers from the AMBA master and the master domain transmits transfers to an AMBA slave.

CoreLink XHB-400

The XHB converts AXI4 protocol to AHB-Lite protocol and has an AXI4 slave interface and an AHB-Lite master interface. 

AXI4 slave interface: This connects to either the AXI4 master interface of a processor or to an AXI interconnect.

AHB-Lite master interface: This implements an AHB-Lite master to drive AHB-Lite subsystems.

XHB-400 TRM

NIC-450 Library of Interconnect IP

Network Interconnect NIC-400
Advanced Quality of Service QoS-400
 Virtual Networks QVN-400
 Thin Links TLX-400
 AMBA Domain Bridge ADB-400
 AXI-to-AHB Bridge XHB-400
 Low-power distributor LPD-500

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0 votes 1714 views 1 replies Latest 8 days ago by Colin Campbell Answer this
Answered Forum FAQs Started 5 days ago by Annie Cracknell 0 replies 662 views
Answered Forum FAQs Started 5 days ago by Annie Cracknell 0 replies 432 views
Suggested answer missing spl/u-boot-spl-ddr.bin when building Uboot for Coral Latest yesterday by nichols51 5 replies 3235 views
Suggested answer Priority Group Setting for NVIC Cortex-M7 Latest 3 days ago by SeanB 1 replies 10402 views
Suggested answer Looking for manufacturer to produce our motherboard design Latest 3 days ago by Ibrahim112 1 replies 9016 views
Suggested answer In APB, for data bus width, can I increase from 32 bits(default) to 64 bits(as per my project requirements)? Latest 8 days ago by Colin Campbell 1 replies 1714 views