The CoreSight ELA-600 Embedded Logic Analyzer inherits the debug capability and signal observability features of CoreSight ELA-500 with further optimization to improve data tracing efficiency and capacity. With CoreSight ELA-600, trigger condition can be set to initiate data tracing or output actions.
You also have the option of either storing trace data within CoreSight ELA-600 embedded SRAM in the same manner as CoreSight ELA-500 or aggregating them onto a larger memory area in the system/external to the SoC.
- Improve low-level signal observability and controllability in post-silicon debug.
- Shorten debug cycle by speeding up error root-cause analysis.
- Improve system efficiency with run-time signal monitoring and control.
CoreSight ELA-600 allows you to identify hard-to-diagnose bugs quickly. This accelerates silicon bring-up.
CoreSight ELA-500 and ELA-600 Comparison
CoreSight ELA-600 gives you additional enhancements that extend existing debug and trace use cases.
|Embedded RAM config|| ✔
|Data compression|| ✔
|Simultaneous trace of 2 SIGNALGRPs on same clock cycle||✔|
|Trigger state counters tracing||✔|
|32-bit segmented trigger state comparators||✔|
Technical Reference Manual
For system designers, systems integrators, and programmers who are designing a SoC, the Technical Reference Manual is the go-to resource.Read here
Useful documents and blogs for designing Arm-based SoCs:
|Not answered||Best most recent text on ARM arch||0 votes||38 views||0 replies||Started 9 hours ago by d.ry||Answer this|
|Not answered||Readunique and cleanunique transactions in ACE protocol||0 votes||49 views||0 replies||Started 10 hours ago by het||Answer this|
|Suggested answer||Store operations where the cache line is already cached (ACE protocol)||2 votes||5764 views||7 replies||Latest 10 hours ago by het||Answer this|
|Suggested answer||Raspberry pi 3 and .net 5 coreclr||1 votes||1950 views||2 replies||Latest yesterday by delinaty||Answer this|
|Not answered||Embedded Multi-core inter communication||0 votes||85 views||0 replies||Started 2 days ago by Benny||Answer this|
|Suggested answer||question about wireless sound transceiver||0 votes||348 views||1 replies||Latest 2 days ago by Andy Neil||Answer this|
|Not answered||Best most recent text on ARM arch Started 9 hours ago by d.ry||0 replies 38 views|
|Not answered||Readunique and cleanunique transactions in ACE protocol Started 10 hours ago by het||0 replies 49 views|
|Suggested answer||Store operations where the cache line is already cached (ACE protocol) Latest 10 hours ago by het||7 replies 5764 views|
|Suggested answer||Raspberry pi 3 and .net 5 coreclr Latest yesterday by delinaty||2 replies 1950 views|
|Not answered||Embedded Multi-core inter communication Started 2 days ago by Benny||0 replies 85 views|
|Suggested answer||question about wireless sound transceiver Latest 2 days ago by Andy Neil||1 replies 348 views|