The Arm CoreSight SDC-600 Secure Debug Channel

CoreSight SDC-600 Chip.

Getting Started

The Arm CoreSight SDC-600 Secure Debug Channel, provides a dedicated path to a debugged system for authenticating debug accesses. Key benefits include:

  • A standardized communication protocol
  • The first layer of protection against debug access attacks
  • Robust security solution with Arm Security IP

Specifications

Conventional Secure JTAG Controller CoreSight SDC-600
Need for external JTAG pins exposure Functional IO/JTAG pins
Simple key-based authentication Certificate and key-based authentication
No / lack of cryptographic involvement Fully interoperable with Crypto IP
Customized communication protocol Standard and open communication protocol

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.

Key features

Authenticated debug through an always-on communication channel

CoreSight SDC-600 addresses the security needs of modern day devices, by allowing silicon and tool vendors to enforce protection and to police debug accesses into the system. This is achieved through a debug certificate, exchanged through a dedicated communication path of CoreSight SDC-600.

Complete end-to-end security solution

CoreSight SDC-600 is intended to work closely with Cryptographic elements, to provide a robust security solution through debug certificate authentication. Arm ensures that CoreSight SDC-600 is designed and tested, to work efficiently with Arm CoreSight IP and Arm Security IP. This provides the most reliable and predictable security implementation for authenticating debug accesses. 

Promoting efficient ecosystem adoption

CoreSight SDC-600 implements the Arm recommended communication protocol, which enables efficient handshake communication between an external agent and target system.

Get support

Community Forums

Not answered AXI fixed burst to a slave with narrow data width
  • AXI
  • AXI4
  • Bus Architecture
0 votes 4 views 0 replies Started 14 hours ago by Sana Answer this
Suggested answer NOR, SPI, U-Boot, Kernal 0 votes 60 views 2 replies Latest yesterday by Andy Neil Answer this
Answered Regarding implementation of a scenario in AHB protocol 0 votes 95 views 4 replies Latest yesterday by Suyash Sharma Answer this
Suggested answer How could CMN600 route snoop transactions to RN-F 0 votes 301 views 2 replies Latest 2 days ago by Joe Chen Answer this
Suggested answer Application scenarios of APB4 0 votes 322 views 1 replies Latest 3 days ago by Christopher Tory Answer this
Suggested answer Outstanding support in AXI slave 0 votes 266 views 1 replies Latest 3 days ago by Christopher Tory Answer this
Not answered AXI fixed burst to a slave with narrow data width Started 14 hours ago by Sana 0 replies 4 views
Suggested answer NOR, SPI, U-Boot, Kernal Latest yesterday by Andy Neil 2 replies 60 views
Answered Regarding implementation of a scenario in AHB protocol Latest yesterday by Suyash Sharma 4 replies 95 views
Suggested answer How could CMN600 route snoop transactions to RN-F Latest 2 days ago by Joe Chen 2 replies 301 views
Suggested answer Application scenarios of APB4 Latest 3 days ago by Christopher Tory 1 replies 322 views
Suggested answer Outstanding support in AXI slave Latest 3 days ago by Christopher Tory 1 replies 266 views