The Arm CoreSight SDC-600 Secure Debug Channel

CoreSight SDC-600 Chip.

Getting Started

The Arm CoreSight SDC-600 Secure Debug Channel, provides a dedicated path to a debugged system for authenticating debug accesses. Key benefits include:

  • A standardized communication protocol
  • The first layer of protection against debug access attacks
  • Robust security solution with Arm Security IP

Specifications

Conventional Secure JTAG Controller CoreSight SDC-600
Need for external JTAG pins exposure Functional IO/JTAG pins
Simple key-based authentication Certificate and key-based authentication
No / lack of cryptographic involvement Fully interoperable with Crypto IP
Customized communication protocol Standard and open communication protocol

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you’re ready to manufacture.

Key features

Authenticated debug through an always-on communication channel

CoreSight SDC-600 addresses the security needs of modern day devices, by allowing silicon and tool vendors to enforce protection and to police debug accesses into the system. This is achieved through a debug certificate, exchanged through a dedicated communication path of CoreSight SDC-600.

Complete end-to-end security solution

CoreSight SDC-600 is intended to work closely with Cryptographic elements, to provide a robust security solution through debug certificate authentication. Arm ensures that CoreSight SDC-600 is designed and tested, to work efficiently with Arm CoreSight IP and Arm Security IP. This provides the most reliable and predictable security implementation for authenticating debug accesses. 

Promoting efficient ecosystem adoption

CoreSight SDC-600 implements the Arm recommended communication protocol, which enables efficient handshake communication between an external agent and target system.

Get support

Community Forums

Answered Forum FAQs
  • ARM Community
0 votes 3669 views 0 replies Started 6 months ago by Annie Answer this
Answered Forum FAQs
  • ARM Community
0 votes 3468 views 0 replies Started 6 months ago by Annie Answer this
Not answered Cyclone V HPS Baremetal Watchdog 0 votes 17 views 0 replies Started 18 hours ago by Roelof Answer this
Suggested answer Where do I find the physical size of the Dstream-PT? 0 votes 265 views 1 replies Latest 3 days ago by Annie Answer this
Not answered about axi protocol 0 votes 145 views 0 replies Started 3 days ago by pranayreddy Answer this
Answered EMBEDDED C - Volatile qualifier does not matter in my interrupt routine
  • Cortex-M7
  • stm32 h7
0 votes 288 views 3 replies Latest 4 days ago by mingche_joe Answer this
Answered Forum FAQs Started 6 months ago by Annie 0 replies 3669 views
Answered Forum FAQs Started 6 months ago by Annie 0 replies 3468 views
Not answered Cyclone V HPS Baremetal Watchdog Started 18 hours ago by Roelof 0 replies 17 views
Suggested answer Where do I find the physical size of the Dstream-PT? Latest 3 days ago by Annie 1 replies 265 views
Not answered about axi protocol Started 3 days ago by pranayreddy 0 replies 145 views
Answered EMBEDDED C - Volatile qualifier does not matter in my interrupt routine Latest 4 days ago by mingche_joe 3 replies 288 views