Specifications

CoreSight SoC-600M is a library of debug and trace components for multi-core systems. The solution is optimized for Arm Cortex-M based devices. 

Benefits
  • Increased system visibility due to additional data bandwidth, reducing risks and increasing developer productivity
  • Remote debug and in-field access via Ethernet or wirelessly, reducing the total cost of ownership
  • Based on the proven Arm CoreSight SoC family used in millions of devices today
Features
  • Efficiently transports debug and trace data from multiple sources to external ports 
  • Enables debug and trace over functional interfaces such as WiFi, USB and Bluetooth in addition to widely used JTAG and SWD interfaces 
  • Provides debug access for starting/halting the debug or registering read/write 
  • Execution and instrumentation trace routing and termination 
  • Cross-triggering to coordinate debug and trace events such as the debug halt request 
  • Time stamping required for correlating traces from different sources 

Start designing now

Arm Flexible Access gives you quick and easy access to this IP, relevant tools and models, and valuable support. You can evaluate and design solutions before committing to production, and only pay when you are ready to manufacture.

Learn more

More than an IP library

CoreSight SoC-600M includes a number of components that support the development of secure and efficient SoCs. The following items have been developed alongside the IP library. 

Security

Debug access extended to functional IO needs to maintain the same level of security as offered through a JTAG connection.

Open-source Linux Drivers

Open-source Linux drivers are critical to self-hosted debug and these drivers will be supplied.

Tools and Software

CoreSight SoC-600M based SoCs will benefit from tools support in Arm Development Studio, as well as support from tool and software providers in the Arm ecosystem.


  • Manual containing technical information.
  • CoreSight SoC-600M Technical Reference Manual

    For system designers, system integrators, and programmers who are designing a SoC, the Technical Reference Manual is the go-to resource.

    Read here

Training

Arm training is written and delivered by the world's most experienced Arm technology trainers. Arm also supports a network of third-party training providers who are licensed to deliver a number of related training courses. 

The top half of a human.

Designing with CoreSight

This course is intended for engineers designing silicon devices for Arm processors with the CoreSight debug architecture. The course covers an introduction to CoreSight and then presents detailed material on each aspect of the technology.

Learn more

Get Support

Community Blogs

Forums

Not answered M0+ Thumb - C flag 0 votes 13 views 0 replies Started 6 hours ago by Sean Dunlevy Answer this
Not answered Is it possible to turn my phone's 64-bit armv8-a (32-bit mode) to 64 bit mode 0 votes 35 views 0 replies Started 8 hours ago by durddudunyaa Answer this
Suggested answer CPSR status back to C variable
  • Arm7
  • Compilers
  • C
0 votes 2530 views 3 replies Latest 20 hours ago by Frost13 Answer this
Suggested answer Is pre-compiled ARM9 libs able to run on an ARM11 chip
  • Arm9
  • Arm11
0 votes 1823 views 4 replies Latest yesterday by Andy Neil Answer this
Not answered M0+ Thumb - C flag Started 6 hours ago by Sean Dunlevy 0 replies 13 views
Not answered Is it possible to turn my phone's 64-bit armv8-a (32-bit mode) to 64 bit mode Started 8 hours ago by durddudunyaa 0 replies 35 views
Suggested answer CPSR status back to C variable Latest 20 hours ago by Frost13 3 replies 2530 views
Suggested answer Is pre-compiled ARM9 libs able to run on an ARM11 chip Latest yesterday by Andy Neil 4 replies 1823 views