The STM-500 is a trace source that is integrated into a CoreSight system. CoreSight STM-500 is designed for high-bandwidth trace of instrumentation embedded into software. STM Advanced eXtensible Interface (AXI) slave is made up of memory-mapped writes, which carry information about the behavior of the software.
CoreSight STM-500 is a natural successor to the CoreSight Instrumentation Trace Macrocell (ITM) in mid- to high-performance applications.
CoreSight STM-500 Features
CoreSight STM-500 has the following features:
- A fully synchronous design with one clock and two resets
- One 64-bit AXI slave interface for extended stimulus port inputs
- One hardware event observation interface for tracing 64 hardware events
- One 32-bit debug APB slave interface for configuration and status
- One 64-bit ATB slave interface for configuration and status
- One DMA peripheral request interface that is compatible with the AMBA DMA Controller DMA-330
- Two depth-configurable FIFO buffers for usage-optimized configurability:
- Data FIFO
- Channel information FIFO
- A fully memory-mapped software stimulus supporting 65,536 stimulus ports and 128 masters
- Leading zero data compression
- Full support for guaranteed and invariant timing software stimulus writes
- Support for single-shot and multi-shot triggers with a cross-trigger port, trigger packet insertion, and ATB trace triggers
- An internal and an external source for STPv2 synchronization
- Timestamping of trace events
- Two low-power interfaces
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CoreSight STM-500 Technical Reference Manual
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