Getting Started

Optimized and efficient access to the DRAM is critical to the performance of any chip. As the number of processing elements on a chip increases, so does the demand for data. With DRAM technology transitioning to DDR4 for infrastructure and LPDDR4 for mobile and consumer applications, not only does the frequency of DRAM operation increase significantly, but also the complexity of making the best use of the DRAM bandwidth to deliver high Quality of Service (QoS) at low power, increases. Managing the differing demands of multiple processing elements while delivering maximum DRAM bandwidth is the primary challenge addressed by the Dynamic Memory Controller (DMC).

The Dynamic Memory Controller family

CoreLink DMC-500 Dynamic Memory Controller

CoreLink DMC-500 Dynamic Memory Controller

  • Specifically designed for low power operation in mobile, consumer and embedded applications that utilize LPDDR4 and LPDDR3 memories
  • Optimized for best memory bandwidth at low latencies with Arm CoreLink CCI and NIC




CoreLink DMC-520 Dynamic Memory Controller

CoreLink DMC-520 Dynamic Memory Controller

  • Targeted at applications in server, networking and high-performance computing, using DDR4 and DDR3 memories
    • Supports enterprise-class requirements for high-density DIMMs, error correction codes and reliability with ease-of-use Optimized for highest performance with the CoreLink CCN family


DMC-620

CoreLink DMC-620 Dynamic Memory Controller

  • Builds on top of DMC-520 features to provide the best performance with RAS and end-to-end QoS support with CoreLink CMN-600.
  • Reduces static pipeline latency by up to 50% compared to DMC-520. Expands support for 3DS DRAM with extended virtual rank support.
  • Improves memory access latency for Arm Cortex v8-A processors significantly under common operating conditions.

Get support

Arm support

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Community Blogs

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Docker enables Arm Cycle Model Studio on Ubuntu

Arm Cycle Model Studio (CMS) is a great tool to create SystemC simulation models from Verilog RTL source code. This articles shows how to use Docker to run CMS and create models on an Ubuntu machine.

26 days ago by Jason Andrews
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Leading the Digital Transformation of the Car at IAA Frankfurt

This week at IAA New Mobility World, to demonstrate the future of in-car experiences, we are exhibiting a market-ready, scalable infotainment and cockpit control system from MediaTek and Mobica, featuring TomTom Navigation.

2 months ago by Andy Moore
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Unlocking Cortex-A53's Safety Potential

Arm will be introducing a Software Test Library (STL) on the Cortex-A53 processor. This is the first applications processor to have self-test Library software provided by Arm.

2 months ago by James Scobie
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AMBA ATP: Gaining momentum with workload modeling

This blog presents examples of AMBA ATP adoption and the benefits that Arm and its ecosystem partners deliver.

3 months ago by Francisco Socal
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Introducing Arm’s Functional Safety Partnership Program

Arm is proud to announce the launch of its Functional Safety Partnership Program which brings together partners in Arm’s broad ecosystem who specialize in the area of functional safety.

3 months ago by Antonio Priore
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Highlights from Hannover Messe 2019

Arm showcased its IoT technology for the visitors of Hannover Messe 2019, the world’s largest industrial trade show.

7 months ago by Kristen
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Answered Difference btw AXI3 and AXI4 Latest 13 hours ago by SATYA369 5 replies 10701 views
Not answered Running .elf file on zynq board ubuntu platform Started yesterday by dolly1192 0 replies 55 views
Not answered WID not present in AXI4 Started 3 days ago by Ravi V. 0 replies 131 views
Not answered Vacuum pump waste gas treatment equipment Started 4 days ago by lay1014 0 replies 186 views
Answered arm9 family nuvoton Latest 4 days ago by sridhar6994 1 replies 749 views
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