Getting Started

Optimized and efficient access to the DRAM is critical to the performance of any chip. As the number of processing elements on a chip increases, so does the demand for data. With DRAM technology transitioning to DDR4 for infrastructure and LPDDR4 for mobile and consumer applications, not only does the frequency of DRAM operation increase significantly, but also the complexity of making the best use of the DRAM bandwidth to deliver high Quality of Service (QoS) at low power, increases. Managing the differing demands of multiple processing elements while delivering maximum DRAM bandwidth is the primary challenge addressed by the Dynamic Memory Controller (DMC).

The Dynamic Memory Controller family

CoreLink DMC-500 Dynamic Memory Controller

CoreLink DMC-500 Dynamic Memory Controller

  • Specifically designed for low power operation in mobile, consumer and embedded applications that utilize LPDDR4 and LPDDR3 memories
  • Optimized for best memory bandwidth at low latencies with Arm CoreLink CCI and NIC




CoreLink DMC-520 Dynamic Memory Controller

CoreLink DMC-520 Dynamic Memory Controller

  • Targeted at applications in server, networking and high-performance computing, using DDR4 and DDR3 memories
    • Supports enterprise-class requirements for high-density DIMMs, error correction codes and reliability with ease-of-use Optimized for highest performance with the CoreLink CCN family


DMC-620

CoreLink DMC-620 Dynamic Memory Controller

  • Builds on top of DMC-520 features to provide the best performance with RAS and end-to-end QoS support with CoreLink CMN-600.
  • Reduces static pipeline latency by up to 50% compared to DMC-520. Expands support for 3DS DRAM with extended virtual rank support.
  • Improves memory access latency for Arm Cortex v8-A processors significantly under common operating conditions.

Get support

Community Blogs

Blog post image
A painless upgrade to 22nm – the right cost with the available IP

In this blog, read about upgrading to 22nm in your ASIC design feature.

22 days ago by Claudia Pike
Blog post image
Simplifying workload modeling with AMBA ATP Engine

Following the release of the AMBA Adaptive Traffic Profiles (ATP) Specification, we are pleased to announce the AMBA ATP Engine, to further facilitate ATP’s adoption into a variety of platforms.

4 months ago by Francisco Socal
1
Blog post image
Development of Arm based systems with Synopsys Virtual Prototyping:…

Find out more about virtual prototyping from Synopsys as thousands of engineers around the world have been asked to work from home.

4 months ago by Jason Andrews
Blog post image
Accelerating Innovation for Safety Systems with Arm Flexible Access

Arm is proud to announce the addition of Arm Safety Packages for select IP within Arm Flexible Access, with the goal to make it easier for developers in the automotive and other safety-related industries to create SoCs.

7 months ago by Chet Babla
Blog post image
Functional Safety on Arm – Beyond Automotive

Arm has moved a long way from the days where our only ‘safety’ requirement was to provide ECC or parity protections on CPU RAMs and we are now able to offer a number of System IP, GPUs, ISPs and NPUs as Safety Ready products. With Arm’s extensive…

9 months ago by Antonio Priore
1
Blog post image
Docker enables Arm Cycle Model Studio on Ubuntu

Arm Cycle Model Studio (CMS) is a great tool to create SystemC simulation models from Verilog RTL source code. This articles shows how to use Docker to run CMS and create models on an Ubuntu machine.

11 months ago by Jason Andrews
2

Community Forums

Suggested answer How feasible and what is the API for packet filtering at harware level (using Trust zone)? 0 votes 515 views 1 replies Latest 21 hours ago by Oliver Beirne Answer this
Not answered What purpose does SINGLE BURST feature in AHB serve? 0 votes 127 views 0 replies Started yesterday by SophiaTrang Answer this
Suggested answer Trustzone impact on battery ?
  • Energy Management
  • TrustZone
 0 votes 140 views 1 replies Latest yesterday by Andy Neil Answer this
Not answered what is different that change start address and use WSTRB signal for transfer 0 votes 136 views 0 replies Started yesterday by ajskdlf Answer this
Suggested answer Any possibilities to automate the image flash into the target other than UMS
  • Deployment automation
 0 votes 186 views 2 replies Latest 2 days ago by Srinuvasan Answer this
Suggested answer What is peripheral and why use low-power in AXI 0 votes 176 views 1 replies Latest 2 days ago by Colin Campbell Answer this
Suggested answer How feasible and what is the API for packet filtering at harware level (using Trust zone)? Latest 21 hours ago by Oliver Beirne 1 replies 515 views
Not answered What purpose does SINGLE BURST feature in AHB serve? Started yesterday by SophiaTrang 0 replies 127 views
Suggested answer Trustzone impact on battery ? Latest yesterday by Andy Neil 1 replies 140 views
Not answered what is different that change start address and use WSTRB signal for transfer Started yesterday by ajskdlf 0 replies 136 views
Suggested answer Any possibilities to automate the image flash into the target other than UMS Latest 2 days ago by Srinuvasan 2 replies 186 views
Suggested answer What is peripheral and why use low-power in AXI Latest 2 days ago by Colin Campbell 1 replies 176 views