Standard System Group design guide.

Getting Started

For many years Arm has been more than just a processor supplier. As you’ve seen from recent public launches, Arm now offers a complete suite of IP for various markets. Reference design is where we elaborate more about what can actually be achieved by the Arm IP in various example systems, which Arm has designed. Arm is now making reference designs available for both mobile and infrastructure designs.

  • A design of a mobile system.

  • Arm CoreLink Reference Design for Mobile

    System guidance created for specific mobile applications.

    Learn more
  • Structures and facilities needed for daily operation.

  • Arm CoreLink Reference Design for Infrastructure

    System guidance created for specific infrastructure applications.

    Learn more
  • The top half of a human.

  • Request information

    Want to know more about system guidance? Contact Arm today.

    Contact us

What is reference design?

Reference design is a collection of resources, which provide a representative view of typical compute subsystems, that can be designed and implemented using specific generations of Arm IP.

Reference design comprises of:

  • Documentation set
  • Fixed Virtual Platform (FVP)
  • Integrated software stack

Key benefits of reference design:

  • Reference design provides free additional information to help customers design SoCs for various target markets
  • It is a comprehensive set of data which helps you develop your SoC faster and with less risk
    • It allows you to quickly assess performance targets to lock down your design quicker
    • It gives you confidence that Arm IP works well together
    • It offers you hardware and software guidelines and links to open source software (with patches)
  • It allows you to leverage key learnings from Arm's system design work
    • It includes solutions to SoC integration challenges and performance analysis summaries
    • This allows you to focus your efforts on differentiation outside of the subsystem

What data is included in reference design?

Documentation set

System Design presentation

  •  Describes architecture explored to achieve performance, power and area targets

Technical Overview document

  • Detailed description of the reference subsystem hardware and software components

Implementation Guidelines

  • Document that describe reference subsystem physical implementation work and trials

System Analysis Report

  • Documents the reference subsystem RTL simulation and emulation performance results

FVP Programmers Guide

  • Describes how to use the Fixed Virtual Platform including the reference subsystem memory mapping and registers

The model

Arm provides a model of the reference subsystem.  This is a Fixed Virtual Platform built on the Arm Fast Model technology.

The model allows you to start software development, based on the software, ahead of having any real silicon. Learn more about Arm Fast Model technology here. 

The software

Arm provides a software package containing build scripts, patches and compiled binaries to enable you to build a complete software stack, up to a target operating system.  The target operating system is Android for mobile and Linux for infrastructure.

How do I access reference design?

Arm is making our reference design available, for free, to interested partners.  Reference design is delivered through the Arm IP portal and provided under license, please contact your partner manager for more information. 

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Resources

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Arm support

Arm training courses and on-site system-design advisory services enable licensees to realize maximum system performance with lowest risk and fastest time-to-market.

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Community Forums

Answered How could I find the critical functions when dual core cpu is fully loading?
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  • embedded linux
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  • Armv8-A
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Answered when I choosed the Debugger 'Connect only', the Debug can not click 0 votes 385 views 4 replies Latest 13 days ago by Ven Answer this
Answered Debug component part numbers
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Answered ARMCC: How to generate assembly
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Answered How can I debug two A53 cores in DS-5 tool
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Answered How to analyze critical function(in kernel module) that caused CPU-bound task by streamline?
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  • Kernel Developers
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  • Streamline Performance Analyzer
 0 votes 227 views 1 replies Latest 1 months ago by Jason Andrews Answer this
Answered How could I find the critical functions when dual core cpu is fully loading? Latest 3 days ago by Myles 2 replies 139 views
Answered when I choosed the Debugger 'Connect only', the Debug can not click Latest 13 days ago by Ven 4 replies 385 views
Answered Debug component part numbers Latest 21 days ago by Juha Aaltonen 4 replies 456 views
Answered ARMCC: How to generate assembly Latest 24 days ago by Holly R. Malin 8 replies 2418 views
Answered How can I debug two A53 cores in DS-5 tool Latest 25 days ago by Ronan Synnott 3 replies 306 views
Answered How to analyze critical function(in kernel module) that caused CPU-bound task by streamline? Latest 1 months ago by Jason Andrews 1 replies 227 views