Getting Started

TrustZone system IP blocks support the Arm TrustZone system-wide approach to security for preventing access by malicious software to memory regions and peripherals such as keyboards and screens. There are three products in this category.


TrustZone Controllers

TZC-400

CoreLink TZC-400 TrustZone Address Space Controller extends on-chip security to protect multiple regions of external memory from software attacks. It is compatible with CCI-400, NIC-400, and DMC-400 product families.

Click to view the TZC-400 TRM

BP147

PrimeCell BP147 TrustZone Protection Controller enables the Secure and Non-secure worlds to safely share peripherals. It supports an APB interface that is common to most I/O peripherals.

Click to view the BP147 TRM

BP141

PrimeCell BP141 TrustZone Internal Memory Wrapper manages a single Secure region with on-chip SRAM memory

Click to view the BP141 TRM

Start designing now

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Arm support

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Community Blogs

Community Forums

Answered Regarding implementation of a scenario in AHB protocol 0 votes 141 views 4 replies Latest 3 days ago by Suyash Sharma Answer this
Answered How to do the ARM state change between 64-bit and 32-bit?
  • 32-bit
  • AArch64
  • Armv8-A
  • 64-bit
  • AArch32
0 votes 17560 views 9 replies Latest 4 days ago by murphy Answer this
Answered How to specify virtual Address for pl011 uart in linux kernel
  • APB Peripherals
  • Arm11
  • PrimeCell UART (PL011)
  • Interrupt
0 votes 5574 views 9 replies Latest 5 days ago by barrysingh101 Answer this
Answered Please explain some of the new ACE5 signals in relation to the MASTER and INTERCONNECT behavior
  • AMBA
  • ACE
  • ACE 5
  • interconnect
  • AMBA 5
0 votes 2911 views 5 replies Latest 5 days ago by Christopher Tory Answer this
Answered Regarding the J bit 0 votes 459 views 4 replies Latest 5 days ago by 42Bastian Schick Answer this
Answered Difference btw AXI3 and AXI4
  • AMBA
  • AXI3
  • AXI4
  • Interface
0 votes 5988 views 4 replies Latest 8 days ago by amareshpc Answer this
Answered Regarding implementation of a scenario in AHB protocol Latest 3 days ago by Suyash Sharma 4 replies 141 views
Answered How to do the ARM state change between 64-bit and 32-bit? Latest 4 days ago by murphy 9 replies 17560 views
Answered How to specify virtual Address for pl011 uart in linux kernel Latest 5 days ago by barrysingh101 9 replies 5574 views
Answered Please explain some of the new ACE5 signals in relation to the MASTER and INTERCONNECT behavior Latest 5 days ago by Christopher Tory 5 replies 2911 views
Answered Regarding the J bit Latest 5 days ago by 42Bastian Schick 4 replies 459 views
Answered Difference btw AXI3 and AXI4 Latest 8 days ago by amareshpc 4 replies 5988 views