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How do I synchronize the AXI-Stream interface between Armv8.0-A processors and the GIC-500?

Article ID: 162271234

Published date: 31 Jan 2018

Last updated: -

Applies to: ARMv8-A, GIC-500 Generic Interrupt Controller

Problem/Question

How do I synchronize the AXI-Stream interface between Armv8.0-A processors and the GIC-500?

Scenario

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Answer

When the Arm CoreLink GIC-500 Generic Interrupt Controller is used as the interrupt controller for all the Armv8.0-A processors, the AXI4 stream interface always runs at the processor clock. Therefore, if the GIC-500 runs at a different frequency from the processor, either synchronous or asynchronous, you must implement a bridge to synchronize the AXI4 Stream interface between Armv8.0-A processors and the GIC-500. The Arm CoreLink ADB-400 AMBA Domain Bridge does support AXI4 stream protocol, so you can use it for this purpose.

Workaround

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Example

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Related Information

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