The Arm CPU architecture specifies the behaviour of a CPU implementation. All Arm-based processor designs are created using the same architecture but have different implementations, leading to different performance characteristics.
It supports a very broad range of performance points, leading to very small implementations of Arm processors and very efficient implementations of advanced designs, using state-of-the-art microarchitecture techniques.
The architecture defines the basic instruction set, as well as the exception and memory models that are relied upon by the operating system and hypervisor.
The microarchitecture of the CPU determines how an implementation meets the architectural contract. It defines the processor’s power, performance and area by determining the pipeline length, levels of cache and so on.
The Arm CPU architecture was originally based upon RISC (Reduced Instruction Set Computer) principles. The name originally stood for Acorn RISC Machine and incorporated:
A uniform register file, where instructions are not restricted to acting on specific registers.
A load/store architecture, where data processing operates only on register contents, not directly on memory contents.
Simple addressing modes, where all load/store addresses are only determined from register contents and instruction fields.
Over time, the Arm architecture has evolved new features to meet the growing demand for new functionality, better security, higher performance, and the needs of new and emerging markets… and it continues to evolve. The name Rich Instruction Set Computer is more relevant today.
Key benefits of the Arm architecture are implementation size, security, performance, and low power consumption – and a global ecosystem providing global support.
There are three versions of the Arm architecture: A-, R- and M-Profiles:
A-Profile is used in complex compute application areas, such as servers, mobile phones and automotive head units.
R-Profile is used where real-time response is required. For example, safety critical applications or those needing a deterministic response, such as medical equipment or vehicle steering, braking and signalling.
M-Profile is used where energy efficiency, power conservation and size are key. M-Profile is especially suitable for deeply-embedded chips. Recently, simple IoT devices have become a key application of M-Profile CPUs. For example, in small sensors, communication modules and smart home products.
The Arm architecture is supported by the provision of debug and visibility tooling in the architecture.
The different architecture profiles and version numbers are written as Armv8-A, Armv7-R, Armv6-M, where A, R and M refer to the relevant profiles and 6, 7 and 8 refer to the different versions of the architecture. This is separate from any Arm IP product numbering.
Optimized for high-level operating systems.
Optimized for real-time high-performance applications.
Optimized for discrete processing and microcontrollers.
Debug and Trace
Debug visibility and trace for A-, R- and M-Profiles.